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Searched refs:m0 (Results 1 – 25 of 26) sorted by relevance

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/arch/powerpc/math-emu/
Dudivmodti4.c158 _FP_W_TYPE m1, m0, n2; in _fp_udivmodti4() local
171 umul_ppmm (m1, m0, q0, d0); in _fp_udivmodti4()
173 if (m1 > n1 || (m1 == n1 && m0 > n0)) in _fp_udivmodti4()
176 sub_ddmmss (m1, m0, m1, m0, d1, d0); in _fp_udivmodti4()
182 sub_ddmmss (n1, n0, n1, n0, m1, m0); in _fp_udivmodti4()
/arch/hexagon/kernel/
Dptrace.c69 ONEXT(&regs->m0, m0); in genregs_get()
114 INEXT(&regs->m0, m0); in genregs_set()
Dsignal.c66 err |= __put_user(regs->m0, &sc->sc_regs.m0); in setup_sigcontext()
93 err |= __get_user(regs->m0, &sc->sc_regs.m0); in restore_sigcontext()
Dvm_events.c40 regs->lc0, regs->sa0, regs->m0); in show_regs()
Dvm_entry.S75 R10 = m0; \
107 m0 = R10; } \
Dkgdb.c65 { " m0", GDB_SIZEOF_REG, offsetof(struct pt_regs, m0)},
/arch/ia64/kernel/
Dpatch.c47 u64 m0, m1, v0, v1, b0, b1, *b = (u64 *) (insn_addr & -16); in ia64_patch() local
57 m0 = mask << shift; m1 = mask >> (64 - shift); in ia64_patch()
59 b[0] = (b0 & ~m0) | (v0 & m0); in ia64_patch()
/arch/blackfin/include/asm/
Dcontext.S32 [--sp] = m0;
104 [--sp] = m0;
163 [--sp] = m0;
264 m0 = [sp++]; define
334 m0 = [sp++]; define
Dptrace.h64 long m0; member
/arch/sh/include/asm/
Dptrace_32.h63 unsigned long m0; member
/arch/hexagon/include/asm/
Duser.h67 unsigned long m0; member
Delf.h145 DEST.m0 = REGS->m0; \
Dregisters.h54 unsigned long m0; member
/arch/xtensa/variants/dc232b/include/variant/
Dtie.h96 XCHAL_SA_REG(s,0,0,0,1, m0, 4, 4, 4,0x0220, sr,32 , 32,0,0,0) \
/arch/powerpc/include/asm/
Dsfp-machine.h297 #define umul_ppmm(ph, pl, m0, m1) \ argument
299 USItype __m0 = (m0), __m1 = (m1); \
/arch/blackfin/kernel/
Dsignal.c74 RESTORE(m0); RESTORE(m1); RESTORE(m2); RESTORE(m3); in rt_restore_sigcontext()
139 SETUP(m0); SETUP(m1); SETUP(m2); SETUP(m3); in rt_setup_sigcontext()
Dkgdb.c35 gdb_regs[BFIN_M0] = regs->m0; in pt_regs_to_gdb_regs()
111 regs->m0 = gdb_regs[BFIN_M0]; in gdb_regs_to_pt_regs()
Dasm-offsets.c71 DEFINE(PT_M0, offsetof(struct pt_regs, m0)); in main()
Dtrace.c970 fp->b0, fp->l0, fp->m0, fp->i0); in show_regs()
/arch/blackfin/mach-common/
Dinterrupt.S46 [--sp] = m0;
Ddpmc_modes.S337 [--sp] = m0;
879 m0 = [sp++]; define
/arch/arm/mach-omap2/
Dmux2420.c17 #define _OMAP2420_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \ argument
21 .muxnames = { m0, m1, m2, m3, m4, m5, m6, m7 }, \
26 #define _OMAP2420_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \ argument
Dmux2430.c17 #define _OMAP2430_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \ argument
21 .muxnames = { m0, m1, m2, m3, m4, m5, m6, m7 }, \
26 #define _OMAP2430_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \ argument
Dmux44xx.c27 #define _OMAP4_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \ argument
31 .muxnames = { m0, m1, m2, m3, m4, m5, m6, m7 }, \
36 #define _OMAP4_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \ argument
/arch/arm/mach-imx/
Dclock-mx51-mx53.c117 static inline u32 _get_mux(struct clk *parent, struct clk *m0, in _get_mux() argument
120 if (parent == m0) in _get_mux()

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