Searched refs:mask_offset (Results 1 – 8 of 8) sorted by relevance
| /arch/arm/mach-davinci/ |
| D | mux.h | 24 .mask_offset = mode_offset, \
35 .mask_offset = mode_offset, \
46 .mask_offset = mode_offset, \
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| D | mux.c | 69 mask = (cfg->mask << cfg->mask_offset); in davinci_cfg_reg()
73 tmp2 = (cfg->mode << cfg->mask_offset); in davinci_cfg_reg()
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| /arch/arm/plat-omap/include/plat/ |
| D | mux.h | 42 .mask_offset = mode_offset, \
56 .mask_offset = mode_offset, \
67 .mask_offset = mode_offset, \
79 .mask_offset = mode_offset, \
122 const unsigned char mask_offset; member
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| /arch/arm/plat-orion/ |
| D | gpio.c | 38 int mask_offset; member
74 return ochip->base + ochip->mask_offset + GPIO_EDGE_MASK_OFF; in GPIO_EDGE_MASK()
79 return ochip->base + ochip->mask_offset + GPIO_LEVEL_MASK_OFF; in GPIO_LEVEL_MASK()
382 u32 base, int mask_offset, int secondary_irq_base) in orion_gpio_init() argument
410 ochip->mask_offset = mask_offset; in orion_gpio_init()
429 ct->regs.mask = ochip->mask_offset + GPIO_LEVEL_MASK_OFF; in orion_gpio_init()
436 ct->regs.mask = ochip->mask_offset + GPIO_EDGE_MASK_OFF; in orion_gpio_init()
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| /arch/arm/plat-orion/include/plat/ |
| D | gpio.h | 29 u32 base, int mask_offset, int secondary_irq_base);
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| /arch/arm/plat-s5p/ |
| D | irq-gpioint.c | 83 int group, pend_offset, mask_offset; in s5p_gpioint_handler() local
99 mask_offset = REG_OFFSET(group); in s5p_gpioint_handler()
100 mask = __raw_readl(GPIO_BASE(chip) + MASK_OFFSET + mask_offset); in s5p_gpioint_handler()
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| /arch/arm/mach-omap1/ |
| D | mux.c | 362 mask = (0x7 << cfg->mask_offset); in omap1_cfg_reg()
366 tmp2 = (cfg->mask << cfg->mask_offset); in omap1_cfg_reg()
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| /arch/arm/mach-davinci/include/mach/ |
| D | mux.h | 26 const unsigned char mask_offset; member
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