Searched refs:max_period (Results 1 – 12 of 12) sorted by relevance
| /arch/arm/include/asm/ |
| D | pmu.h | 126 u64 max_period; member
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| /arch/x86/kernel/cpu/ |
| D | perf_event_p6.c | 121 .max_period = (1ULL << 31) - 1,
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| D | perf_event_amd.c | 440 .max_period = (1ULL << 47) - 1,
615 .max_period = (1ULL << 47) - 1,
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| D | perf_event.c | 302 hwc->sample_period = x86_pmu.max_period; in x86_setup_perfctr()
961 if (left > x86_pmu.max_period) in x86_perf_event_set_period()
962 left = x86_pmu.max_period; in x86_perf_event_set_period()
1401 pr_info("... max period: %016Lx\n", x86_pmu.max_period); in init_hw_perf_events()
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| D | perf_event.h | 327 u64 max_period; member
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| D | perf_event_intel.c | 1477 .max_period = (1ULL << 31) - 1,
1615 .max_period = (1ULL << 31) - 1,
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| D | perf_event_p4.c | 1307 .max_period = (1ULL << (ARCH_P4_CNTRVAL_BITS - 1)) - 1,
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| /arch/arm/kernel/ |
| D | perf_event.c | 173 if (left > (s64)armpmu->max_period) in armpmu_event_set_period()
174 left = armpmu->max_period; in armpmu_event_set_period()
201 delta = (new_raw_count - prev_raw_count) & armpmu->max_period; in armpmu_event_update()
532 hwc->sample_period = armpmu->max_period >> 1; in __hw_perf_event_init()
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| D | perf_event_v6.c | 667 .max_period = (1LLU << 32) - 1,
702 .max_period = (1LLU << 32) - 1,
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| D | perf_event_xscale.c | 452 .max_period = (1LLU << 32) - 1,
822 .max_period = (1LLU << 32) - 1,
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| D | perf_event_v7.c | 1247 .max_period = (1LLU << 32) - 1,
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| /arch/mips/kernel/ |
| D | perf_event_mipsxx.c | 85 u64 max_period; member
389 if (left > mipspmu.max_period) { in mipspmu_event_set_period()
390 left = mipspmu.max_period; in mipspmu_event_set_period()
1259 hwc->sample_period = mipspmu.max_period; in __hw_perf_event_init()
1584 mipspmu.max_period = (1ULL << 63) - 1; in init_hw_perf_events()
1591 mipspmu.max_period = (1ULL << 31) - 1; in init_hw_perf_events()
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