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Searched refs:mode (Results 1 – 25 of 943) sorted by relevance

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/arch/x86/boot/
Dvideo-mode.c54 int mode_defined(u16 mode) in mode_defined() argument
63 if (mi->mode == mode) in mode_defined()
72 static int raw_set_mode(u16 mode, u16 *real_mode) in raw_set_mode() argument
79 mode &= ~VIDEO_RECALC; in raw_set_mode()
88 if ((mode == nmode && visible) || in raw_set_mode()
89 mode == mi->mode || in raw_set_mode()
90 mode == (mi->y << 8)+mi->x) { in raw_set_mode()
91 *real_mode = mi->mode; in raw_set_mode()
102 if (mode >= card->xmode_first && in raw_set_mode()
103 mode < card->xmode_first+card->xmode_n) { in raw_set_mode()
[all …]
Dvideo-bios.c24 static int set_bios_mode(u8 mode);
28 return set_bios_mode(mi->mode - VIDEO_FIRST_BIOS); in bios_set_mode()
31 static int set_bios_mode(u8 mode) in set_bios_mode() argument
37 ireg.al = mode; /* AH=0x00 Set Video Mode */ in set_bios_mode()
48 if (new_mode == mode) in set_bios_mode()
65 u8 mode; in bios_probe() local
83 for (mode = 0x14; mode <= 0x7f; mode++) { in bios_probe()
87 if (mode_defined(VIDEO_FIRST_BIOS+mode)) in bios_probe()
90 if (set_bios_mode(mode)) in bios_probe()
108 mi->mode = VIDEO_FIRST_BIOS+mode; in bios_probe()
Dvideo-vga.c44 u8 mode; in vga_set_basic_mode() local
51 mode = oreg.al; in vga_set_basic_mode()
53 if (mode != 3 && mode != 7) in vga_set_basic_mode()
54 mode = 3; in vga_set_basic_mode()
57 ireg.ax = mode; /* AH=0: set mode */ in vga_set_basic_mode()
60 return mode; in vga_set_basic_mode()
193 static int vga_set_mode(struct mode_info *mode) in vga_set_mode() argument
199 force_x = mode->x; in vga_set_mode()
200 force_y = mode->y; in vga_set_mode()
202 switch (mode->mode) { in vga_set_mode()
Dvideo-vesa.c35 u16 mode; in vesa_probe() local
55 while ((mode = rdfs16(mode_ptr)) != 0xffff) { in vesa_probe()
61 if (mode & ~0x1ff) in vesa_probe()
67 ireg.cx = mode; in vesa_probe()
78 mi->mode = mode + VIDEO_FIRST_VESA; in vesa_probe()
93 mi->mode = mode + VIDEO_FIRST_VESA; in vesa_probe()
105 static int vesa_set_mode(struct mode_info *mode) in vesa_set_mode() argument
109 u16 vesa_mode = mode->mode - VIDEO_FIRST_VESA; in vesa_set_mode()
147 force_x = mode->x; in vesa_set_mode()
148 force_y = mode->y; in vesa_set_mode()
/arch/mips/include/asm/octeon/
Dcvmx-spi.h49 int (*reset_cb) (int interface, cvmx_spi_mode_t mode);
52 int (*calendar_setup_cb) (int interface, cvmx_spi_mode_t mode,
56 int (*clock_detect_cb) (int interface, cvmx_spi_mode_t mode,
60 int (*training_cb) (int interface, cvmx_spi_mode_t mode, int timeout);
63 int (*calendar_sync_cb) (int interface, cvmx_spi_mode_t mode,
67 int (*interface_up_cb) (int interface, cvmx_spi_mode_t mode);
97 extern int cvmx_spi_start_interface(int interface, cvmx_spi_mode_t mode,
113 extern int cvmx_spi_restart_interface(int interface, cvmx_spi_mode_t mode,
183 extern int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode);
200 extern int cvmx_spi_calendar_setup_cb(int interface, cvmx_spi_mode_t mode,
[all …]
/arch/blackfin/lib/
Dgcclib.h10 typedef unsigned int UQItype __attribute__ ((mode(QI)));
11 typedef int SItype __attribute__ ((mode(SI)));
12 typedef unsigned int USItype __attribute__ ((mode(SI)));
13 typedef int DItype __attribute__ ((mode(DI)));
14 typedef int word_type __attribute__ ((mode(__word__)));
15 typedef unsigned int UDItype __attribute__ ((mode(DI)));
/arch/mips/cavium-octeon/executive/
Dcvmx-interrupt-rsl.c78 union cvmx_gmxx_inf_mode mode; in __cvmx_interrupt_gmxx_enable() local
83 mode.u64 = cvmx_read_csr(CVMX_GMXX_INF_MODE(interface)); in __cvmx_interrupt_gmxx_enable()
86 if (mode.s.en) { in __cvmx_interrupt_gmxx_enable()
87 switch (mode.cn56xx.mode) { in __cvmx_interrupt_gmxx_enable()
102 if (mode.s.en) { in __cvmx_interrupt_gmxx_enable()
110 if (mode.s.type) in __cvmx_interrupt_gmxx_enable()
120 if (mode.s.type) in __cvmx_interrupt_gmxx_enable()
Dcvmx-spi.c105 int cvmx_spi_start_interface(int interface, cvmx_spi_mode_t mode, int timeout, in cvmx_spi_start_interface() argument
114 INVOKE_CB(cvmx_spi_callbacks.reset_cb, interface, mode); in cvmx_spi_start_interface()
117 INVOKE_CB(cvmx_spi_callbacks.calendar_setup_cb, interface, mode, in cvmx_spi_start_interface()
121 INVOKE_CB(cvmx_spi_callbacks.clock_detect_cb, interface, mode, timeout); in cvmx_spi_start_interface()
124 INVOKE_CB(cvmx_spi_callbacks.training_cb, interface, mode, timeout); in cvmx_spi_start_interface()
127 INVOKE_CB(cvmx_spi_callbacks.calendar_sync_cb, interface, mode, in cvmx_spi_start_interface()
131 INVOKE_CB(cvmx_spi_callbacks.interface_up_cb, interface, mode); in cvmx_spi_start_interface()
150 int cvmx_spi_restart_interface(int interface, cvmx_spi_mode_t mode, int timeout) in cvmx_spi_restart_interface() argument
157 cvmx_dprintf("SPI%d: Restart %s\n", interface, modes[mode]); in cvmx_spi_restart_interface()
160 INVOKE_CB(cvmx_spi_callbacks.reset_cb, interface, mode); in cvmx_spi_restart_interface()
[all …]
/arch/arm/mach-ks8695/
Dirq.c69 unsigned long ctrl, mode; in ks8695_irq_set_type() local
76 mode = IOPC_TM_HIGH; in ks8695_irq_set_type()
80 mode = IOPC_TM_LOW; in ks8695_irq_set_type()
84 mode = IOPC_TM_RISING; in ks8695_irq_set_type()
87 mode = IOPC_TM_FALLING; in ks8695_irq_set_type()
90 mode = IOPC_TM_EDGE; in ks8695_irq_set_type()
99 ctrl |= IOPC_IOEINT0_MODE(mode); in ks8695_irq_set_type()
103 ctrl |= IOPC_IOEINT1_MODE(mode); in ks8695_irq_set_type()
107 ctrl |= IOPC_IOEINT2_MODE(mode); in ks8695_irq_set_type()
111 ctrl |= IOPC_IOEINT3_MODE(mode); in ks8695_irq_set_type()
/arch/mips/include/asm/mach-au1x00/
Dau1xxx_ide.h171 #define SBC_IDE_TIMING(mode) \ argument
172 (SBC_IDE_##mode##_TWCS | \
173 SBC_IDE_##mode##_TCSH | \
174 SBC_IDE_##mode##_TCSOFF | \
175 SBC_IDE_##mode##_TWP | \
176 SBC_IDE_##mode##_TCSW | \
177 SBC_IDE_##mode##_TPM | \
178 SBC_IDE_##mode##_TA)
Dau1000_dma.h114 unsigned int mode; member
234 u32 mode; in init_dma() local
244 mode = chan->mode | (chan->dev_id << DMA_DID_BIT); in init_dma()
246 mode |= DMA_IE; in init_dma()
248 au_writel(~mode, chan->io + DMA_MODE_CLEAR); in init_dma()
249 au_writel(mode, chan->io + DMA_MODE_SET); in init_dma()
255 static inline void set_dma_mode(unsigned int dmanr, unsigned int mode) in set_dma_mode() argument
266 mode &= (DMA_BE | DMA_DR | DMA_TS8 | DMA_DW_MASK | DMA_NC); in set_dma_mode()
267 chan->mode &= ~(DMA_BE | DMA_DR | DMA_TS8 | DMA_DW_MASK | DMA_NC); in set_dma_mode()
268 chan->mode |= mode; in set_dma_mode()
[all …]
/arch/arm/kernel/
Disa.c28 .mode = 0444,
34 .mode = 0444,
40 .mode = 0444,
50 .mode = 0555,
58 .mode = 0555,
/arch/sparc/boot/
Dbtfixupprep.c36 int mode; variable
93 for (mode = 0;; mode++) in set_mode()
94 if (buffer[mode] < '0' || buffer[mode] > '9') in set_mode()
96 if (mode != 8 && mode != 16) in set_mode()
137 if (mode == 0) in main()
141 if (strlen (buffer) < 22+mode) in main()
143 if (strncmp (buffer + mode, " R_SPARC_", 9)) in main()
145 nbase = 27 - 8 + mode; in main()
223 if (strncmp (buffer + mode+9, "32 ", 10)) { in main()
227 } else if (strncmp (buffer + mode+9, "WDISP30 ", 10) && in main()
[all …]
/arch/mips/kernel/
Dirq_txx9.c63 unsigned char mode; member
108 if (unlikely(TXx9_IRCR_EDGE(txx9irq[irq_nr].mode))) in txx9_irq_mask_ack()
118 int mode; in txx9_irq_set_type() local
123 case IRQF_TRIGGER_RISING: mode = TXx9_IRCR_UP; break; in txx9_irq_set_type()
124 case IRQF_TRIGGER_FALLING: mode = TXx9_IRCR_DOWN; break; in txx9_irq_set_type()
125 case IRQF_TRIGGER_HIGH: mode = TXx9_IRCR_HIGH; break; in txx9_irq_set_type()
126 case IRQF_TRIGGER_LOW: mode = TXx9_IRCR_LOW; break; in txx9_irq_set_type()
134 cr |= (mode & 0x3) << ofs; in txx9_irq_set_type()
136 txx9irq[irq_nr].mode = mode; in txx9_irq_set_type()
156 txx9irq[i].mode = TXx9_IRCR_LOW; in txx9_irq_init()
/arch/arm/mach-pxa/
Dpxa2xx.c45 void pxa2xx_transceiver_mode(struct device *dev, int mode) in pxa2xx_transceiver_mode() argument
47 if (mode & IR_OFF) { in pxa2xx_transceiver_mode()
49 } else if (mode & IR_SIRMODE) { in pxa2xx_transceiver_mode()
51 } else if (mode & IR_FIRMODE) { in pxa2xx_transceiver_mode()
/arch/mips/lasat/
Dsysctl.c184 .mode = 0444,
191 .mode = 0444,
198 .mode = 0444,
205 .mode = 0644,
213 .mode = 0644,
220 .mode = 0644,
229 .mode = 0600,
236 .mode = 0644,
244 .mode = 0644,
252 .mode = 0444,
[all …]
/arch/mips/txx9/generic/
Dirq_tx4939.c50 unsigned char mode; member
95 if (TXx9_IRCR_EDGE(tx4939irq[irq_nr].mode)) { in tx4939_irq_mask_ack()
110 int mode; in tx4939_irq_set_type() local
116 mode = TXx9_IRCR_UP; in tx4939_irq_set_type()
119 mode = TXx9_IRCR_DOWN; in tx4939_irq_set_type()
122 mode = TXx9_IRCR_HIGH; in tx4939_irq_set_type()
125 mode = TXx9_IRCR_LOW; in tx4939_irq_set_type()
140 cr |= (mode & 0x3) << ofs; in tx4939_irq_set_type()
142 tx4939irq[irq_nr].mode = mode; in tx4939_irq_set_type()
178 tx4939irq[i].mode = TXx9_IRCR_LOW; in tx4939_irq_init()
/arch/alpha/include/asm/
Dfloppy.h22 #define fd_set_dma_mode(mode) set_dma_mode(FLOPPY_DMA,mode) argument
36 #define fd_dma_setup(addr,size,mode,io) alpha_fd_dma_setup(addr,size,mode,io) argument
39 alpha_fd_dma_setup(char *addr, unsigned long size, int mode, int io) in alpha_fd_dma_setup() argument
47 dir = (mode != DMA_MODE_READ) ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE; in alpha_fd_dma_setup()
66 fd_set_dma_mode(mode); in alpha_fd_dma_setup()
/arch/arm/mach-omap2/
Dusb-musb.c45 .mode = MUSB_OTG,
47 .mode = MUSB_HOST,
49 .mode = MUSB_PERIPHERAL,
65 .mode = MUSB_OTG,
90 musb_plat.mode = board_data->mode; in usb_musb_init()
/arch/m68k/include/asm/
Ddma.h167 static __inline__ void set_dma_mode(unsigned int dmanr, char mode) in set_dma_mode() argument
174 printk("set_dma_mode(dmanr=%d,mode=%d)\n", dmanr, mode); in set_dma_mode()
189 ((mode & DMA_MODE_SINGLE_BIT) ? MCFDMA_DCR_SAA : 0) | in set_dma_mode()
191 ((mode & DMA_MODE_WRITE_BIT) ? MCFDMA_DCR_S_RW : 0) | in set_dma_mode()
193 ((mode & DMA_MODE_WRITE_BIT) ? MCFDMA_DCR_SINC : MCFDMA_DCR_DINC) | in set_dma_mode()
195 ((mode & DMA_MODE_WORD_BIT) ? MCFDMA_DCR_SSIZE_WORD : in set_dma_mode()
196 ((mode & DMA_MODE_LONG_BIT) ? MCFDMA_DCR_SSIZE_LONG : in set_dma_mode()
198 ((mode & DMA_MODE_WORD_BIT) ? MCFDMA_DCR_DSIZE_WORD : in set_dma_mode()
199 ((mode & DMA_MODE_LONG_BIT) ? MCFDMA_DCR_DSIZE_LONG : in set_dma_mode()
358 static __inline__ void set_dma_mode(unsigned int dmanr, char mode) in set_dma_mode() argument
[all …]
/arch/avr32/mach-at32ap/
Dhsmc.c141 u32 setup, pulse, cycle, mode; in smc_set_configuration() local
161 mode = HSMC_BF(DBW, HSMC_DBW_8_BITS); in smc_set_configuration()
164 mode = HSMC_BF(DBW, HSMC_DBW_16_BITS); in smc_set_configuration()
167 mode = HSMC_BF(DBW, HSMC_DBW_32_BITS); in smc_set_configuration()
175 mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_DISABLED); in smc_set_configuration()
178 mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_RESERVED); in smc_set_configuration()
181 mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_FROZEN); in smc_set_configuration()
184 mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_READY); in smc_set_configuration()
191 mode |= HSMC_BF(TDF_CYCLES, config->tdf_cycles); in smc_set_configuration()
195 mode |= HSMC_BIT(READ_MODE); in smc_set_configuration()
[all …]
/arch/powerpc/include/asm/
Dfloppy.h23 #define fd_set_dma_mode(mode) set_dma_mode(FLOPPY_DMA, mode) argument
34 #define fd_dma_setup(addr,size,mode,io) fd_ops->_dma_setup(addr,size,mode,io) argument
42 int (*_dma_setup)(char *addr, unsigned long size, int mode, int io);
117 static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io) in vdma_dma_setup() argument
121 virtual_dma_mode = (mode == DMA_MODE_WRITE); in vdma_dma_setup()
128 static int hard_dma_setup(char *addr, unsigned long size, int mode, int io) in hard_dma_setup() argument
137 dir = (mode == DMA_MODE_READ) ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE; in hard_dma_setup()
156 fd_set_dma_mode(mode); in hard_dma_setup()
/arch/s390/math-emu/
Dmath.c150 int mode; in emu_axbr() local
152 mode = current->thread.fp_regs.fpc & 3; in emu_axbr()
171 int mode; in emu_adbr() local
173 mode = current->thread.fp_regs.fpc & 3; in emu_adbr()
186 int mode; in emu_adb() local
188 mode = current->thread.fp_regs.fpc & 3; in emu_adb()
201 int mode; in emu_aebr() local
203 mode = current->thread.fp_regs.fpc & 3; in emu_aebr()
216 int mode; in emu_aeb() local
218 mode = current->thread.fp_regs.fpc & 3; in emu_aeb()
[all …]
/arch/frv/kernel/
Dpm.c156 int retval, mode; in sysctl_pm_do_suspend() local
161 mode = user_atoi(buffer, *lenp); in sysctl_pm_do_suspend()
162 if ((mode != 1) && (mode != 5)) in sysctl_pm_do_suspend()
166 if (mode == 5) in sysctl_pm_do_suspend()
305 .mode = 0200,
312 .mode = 0644,
319 .mode = 0644,
326 .mode = 0644,
336 .mode = 0555,
/arch/arm/mach-imx/
Dpm-imx3.c22 void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode) in mx3_cpu_lp_set() argument
27 switch (mode) { in mx3_cpu_lp_set()
34 pr_err("Unknown cpu power mode: %d\n", mode); in mx3_cpu_lp_set()

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