| /arch/mips/include/asm/ |
| D | titan_dep.h | 19 #define TITAN_READ(ofs) \ argument
20 (*(volatile u32 *)(ocd_base+(ofs)))
21 #define TITAN_READ_16(ofs) \ argument
22 (*(volatile u16 *)(ocd_base+(ofs)))
23 #define TITAN_READ_8(ofs) \ argument
24 (*(volatile u8 *)(ocd_base+(ofs)))
26 #define TITAN_WRITE(ofs, data) \ argument
27 do { *(volatile u32 *)(ocd_base+(ofs)) = (data); } while (0)
28 #define TITAN_WRITE_16(ofs, data) \ argument
29 do { *(volatile u16 *)(ocd_base+(ofs)) = (data); } while (0)
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| D | gt64120.h | 568 #define __GT_READ(ofs) \ argument
569 (*(volatile u32 *)(GT64120_BASE+(ofs)))
570 #define __GT_WRITE(ofs, data) \ argument
571 do { *(volatile u32 *)(GT64120_BASE+(ofs)) = (data); } while (0)
572 #define GT_READ(ofs) le32_to_cpu(__GT_READ(ofs)) argument
573 #define GT_WRITE(ofs, data) __GT_WRITE(ofs, cpu_to_le32(data)) argument
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| /arch/arm/mach-mxs/ |
| D | iomux.c | 39 u32 reg, ofs, bp, bm; in mxs_iomux_setup_pad() local
43 ofs = 0x100; in mxs_iomux_setup_pad()
44 ofs += PAD_BANK(pad) * 0x20 + PAD_PIN(pad) / 16 * 0x10; in mxs_iomux_setup_pad()
47 reg = __raw_readl(iomux_base + ofs); in mxs_iomux_setup_pad()
50 __raw_writel(reg, iomux_base + ofs); in mxs_iomux_setup_pad()
53 ofs = cpu_is_mx23() ? 0x200 : 0x300; in mxs_iomux_setup_pad()
54 ofs += PAD_BANK(pad) * 0x40 + PAD_PIN(pad) / 8 * 0x10; in mxs_iomux_setup_pad()
59 reg = __raw_readl(iomux_base + ofs); in mxs_iomux_setup_pad()
62 __raw_writel(reg, iomux_base + ofs); in mxs_iomux_setup_pad()
68 __mxs_setl(1 << bp, iomux_base + ofs); in mxs_iomux_setup_pad()
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| /arch/mips/txx9/generic/ |
| D | irq_tx4939.c | 57 int ofs; in tx4939_irq_unmask() local
65 ofs = (irq_nr & 16) + (irq_nr & 1) * 8; in tx4939_irq_unmask()
66 __raw_writel((__raw_readl(lvlp) & ~(0xff << ofs)) in tx4939_irq_unmask()
67 | (tx4939irq[irq_nr].level << ofs), in tx4939_irq_unmask()
75 int ofs; in tx4939_irq_mask() local
83 ofs = (irq_nr & 16) + (irq_nr & 1) * 8; in tx4939_irq_mask()
84 __raw_writel((__raw_readl(lvlp) & ~(0xff << ofs)) in tx4939_irq_mask()
85 | (irc_dlevel << ofs), in tx4939_irq_mask()
109 int ofs; in tx4939_irq_set_type() local
137 ofs = (((irq_nr & 16) >> 1) | (irq_nr & (8 - 1))) * 2; in tx4939_irq_set_type()
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| /arch/xtensa/variants/s6000/include/variant/ |
| D | tie-asm.h | 37 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
38 xchal_sa_start \continue, \ofs
52 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
53 xchal_sa_start \continue, \ofs
74 .macro xchal_cp0_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
75 xchal_sa_start \continue, \ofs
108 .macro xchal_cp0_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
109 xchal_sa_start \continue, \ofs
144 .macro xchal_cp6_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
145 xchal_sa_start \continue, \ofs
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| /arch/mips/kernel/ |
| D | irq_txx9.c | 70 int ofs = irq_nr / 16 * 16 + (irq_nr & 1) * 8; in txx9_irq_unmask() local
72 __raw_writel((__raw_readl(ilrp) & ~(0xff << ofs)) in txx9_irq_unmask()
73 | (txx9irq[irq_nr].level << ofs), in txx9_irq_unmask()
86 int ofs = irq_nr / 16 * 16 + (irq_nr & 1) * 8; in txx9_irq_mask() local
88 __raw_writel((__raw_readl(ilrp) & ~(0xff << ofs)) in txx9_irq_mask()
89 | (irc_dlevel << ofs), in txx9_irq_mask()
117 int ofs; in txx9_irq_set_type() local
132 ofs = (irq_nr & (8 - 1)) * 2; in txx9_irq_set_type()
133 cr &= ~(0x3 << ofs); in txx9_irq_set_type()
134 cr |= (mode & 0x3) << ofs; in txx9_irq_set_type()
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| D | process.c | 334 unsigned long ofs; in frame_info_init() local
336 kallsyms_lookup_size_offset((unsigned long)schedule, &size, &ofs); in frame_info_init()
379 unsigned long size, ofs; in unwind_stack_by_address() local
406 if (!kallsyms_lookup_size_offset(pc, &size, &ofs)) in unwind_stack_by_address()
411 if (unlikely(ofs == 0)) { in unwind_stack_by_address()
417 info.func = (void *)(pc - ofs); in unwind_stack_by_address()
418 info.func_size = ofs; /* analyze from start to ofs */ in unwind_stack_by_address()
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| /arch/sh/include/mach-common/mach/ |
| D | urquell.h | 30 #define BOARDREG(ofs) (FPGA_BASE + ofs##_OFS) argument
31 #define UBOARDREG(ofs) (0xa0000000 + FPGA_BASE + ofs##_OFS) argument
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| /arch/xtensa/variants/fsf/include/variant/ |
| D | tie-asm.h | 37 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
38 xchal_sa_start \continue, \ofs
52 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
53 xchal_sa_start \continue, \ofs
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| /arch/ia64/kernel/ |
| D | elfcore.c | 20 Elf64_Off ofs = 0; in elf_core_write_extra_phdrs() local
28 if (ofs == 0) { in elf_core_write_extra_phdrs()
29 ofs = phdr.p_offset = offset; in elf_core_write_extra_phdrs()
32 phdr.p_offset = ofs; in elf_core_write_extra_phdrs()
35 phdr.p_offset += ofs; in elf_core_write_extra_phdrs()
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| /arch/arm/mach-netx/include/mach/ |
| D | netx-regs.h | 118 #define NETX_SYSTEM_REG(ofs) IOMEM(NETX_VA_SYSTEM + (ofs)) argument
188 #define NETX_GPIO_REG(ofs) IOMEM(NETX_VA_GPIO + (ofs)) argument
233 #define NETX_PIO_REG(ofs) IOMEM(NETX_VA_PIO + (ofs)) argument
320 #define NETX_PFIFO_REG(ofs) IOMEM(NETX_VA_PFIFO + (ofs)) argument
337 #define NETX_MEMCR_REG(ofs) IOMEM(NETX_VA_MEMCR + (ofs)) argument
358 #define NETX_DPMAS_REG(ofs) IOMEM(NETX_VA_DPMAS + (ofs)) argument
428 #define NETX_I2C_REG(ofs) IOMEM(NETX_VA_I2C, (ofs)) argument
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| /arch/frv/mb93090-mb00/ |
| D | pci-dma-nommu.c | 29 unsigned long ofs; member
60 end = this_r->ofs; in dma_alloc_coherent()
65 start = this_r->ofs + this_r->len; in dma_alloc_coherent()
73 new->ofs = start; in dma_alloc_coherent()
96 if (rec->ofs == dma_handle) { in dma_free_coherent()
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| /arch/powerpc/kernel/vdso32/ |
| D | sigtramp.S | 57 #define rsave(regno, ofs) \ argument
64 .ifne ofs; \
65 .byte 0x23; .uleb128 ofs; /* DW_OP_plus_uconst */ \
114 #define vsave_msr2(regno, ofs) \ argument
119 .byte 0x0a; .short ofs; /* DW_OP_const2u */ \
124 #define vsave(regno, ofs) \ argument
132 .byte 0x23; .uleb128 ofs; /* DW_OP_plus_uconst */ \
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| /arch/powerpc/kernel/vdso64/ |
| D | sigtramp.S | 56 #define rsave(regno, ofs) \ argument
63 .ifne ofs; \
64 .byte 0x23; .uleb128 ofs; /* DW_OP_plus_uconst */ \
114 #define vsave_msr2(regno, ofs) \ argument
119 .byte 0x0a; .short ofs; /* DW_OP_const2u */ \
124 #define vsave(regno, ofs) \ argument
133 .byte 0x23; .uleb128 ofs; /* DW_OP_plus_uconst */ \
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| /arch/mips/txx9/rbtx4939/ |
| D | setup.c | 292 static unsigned long rbtx4939_flash_fixup_ofs(unsigned long ofs) in rbtx4939_flash_fixup_ofs() argument
301 return (ofs & ~0xc00000) | ((((ofs >> 22) + shift) & 3) << 22); in rbtx4939_flash_fixup_ofs()
306 ofs ^= 0x400000; /* swap A[22] */ in rbtx4939_flash_fixup_ofs()
308 return ofs; in rbtx4939_flash_fixup_ofs()
311 static map_word rbtx4939_flash_read16(struct map_info *map, unsigned long ofs) in rbtx4939_flash_read16() argument
315 ofs = rbtx4939_flash_fixup_ofs(ofs); in rbtx4939_flash_read16()
316 r.x[0] = __raw_readw(map->virt + ofs); in rbtx4939_flash_read16()
321 unsigned long ofs) in rbtx4939_flash_write16() argument
323 ofs = rbtx4939_flash_fixup_ofs(ofs); in rbtx4939_flash_write16()
324 __raw_writew(datum.x[0], map->virt + ofs); in rbtx4939_flash_write16()
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| /arch/x86/um/ |
| D | elfcore.c | 23 Elf32_Off ofs = 0; in elf_core_write_extra_phdrs() local
29 ofs = phdr.p_offset = offset; in elf_core_write_extra_phdrs()
32 phdr.p_offset += ofs; in elf_core_write_extra_phdrs()
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| /arch/sparc/kernel/ |
| D | time_32.c | 108 static unsigned char mostek_read_byte(struct device *dev, u32 ofs) in mostek_read_byte() argument
113 return readb(pdata->ioaddr + ofs); in mostek_read_byte()
116 static void mostek_write_byte(struct device *dev, u32 ofs, u8 val) in mostek_write_byte() argument
121 writeb(val, pdata->ioaddr + ofs); in mostek_write_byte()
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| /arch/xtensa/variants/dc232b/include/variant/ |
| D | tie-asm.h | 37 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
38 xchal_sa_start \continue, \ofs
78 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
79 xchal_sa_start \continue, \ofs
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| /arch/arm/mach-omap1/ |
| D | mailbox.c | 41 static inline int mbox_read_reg(size_t ofs) in mbox_read_reg() argument
43 return __raw_readw(mbox_base + ofs); in mbox_read_reg()
46 static inline void mbox_write_reg(u32 val, size_t ofs) in mbox_write_reg() argument
48 __raw_writew(val, mbox_base + ofs); in mbox_write_reg()
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| /arch/arm/mach-iop13xx/include/mach/ |
| D | iop13xx.h | 262 #define IOP13XX_ATUX_OFFSET(ofs) IOP13XX_REG_ADDR32(\ argument
263 iop13xx_atux_pmmr_offset + (ofs))
345 #define IOP13XX_ATUE_OFFSET(ofs) IOP13XX_REG_ADDR32(\ argument
346 iop13xx_atue_pmmr_offset + (ofs))
462 #define IOP13XX_MU_OFFSET(ofs) IOP13XX_REG_ADDR32(IOP13XX_MU_PMMR_OFFSET +\ argument
463 (ofs))
507 #define IOP13XX_PBI_OFFSET(ofs) IOP13XX_REG_ADDR32(IOP13XX_PBI_PMMR_OFFSET +\ argument
508 (ofs))
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| /arch/microblaze/kernel/ |
| D | unwind.c | 192 int ofs = 0; in microblaze_unwind_inner() local
235 pc -= ofs; in microblaze_unwind_inner()
265 ofs = sizeof(unsigned long); in microblaze_unwind_inner()
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| /arch/sh/kernel/cpu/sh5/ |
| D | unwind.c | 224 int ofs = 0; in sh64_unwind_inner() local
264 pc -= ofs; in sh64_unwind_inner()
279 ofs = sizeof(unsigned long); in sh64_unwind_inner()
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| /arch/alpha/include/asm/ |
| D | bitops.h | 447 unsigned long b0, b1, ofs, tmp; in sched_find_first_bit() local
451 ofs = (b0 ? 0 : 64); in sched_find_first_bit()
454 return __ffs(tmp) + ofs; in sched_find_first_bit()
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| /arch/alpha/kernel/ |
| D | sys_cabriolet.c | 43 int ofs = (irq - 16) / 8; in cabriolet_update_irq_hw() local
44 outb(mask >> (16 + ofs * 8), 0x804 + ofs); in cabriolet_update_irq_hw()
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| /arch/arm/mach-omap2/ |
| D | mailbox.c | 65 static inline unsigned int mbox_read_reg(size_t ofs) in mbox_read_reg() argument
67 return __raw_readl(mbox_base + ofs); in mbox_read_reg()
70 static inline void mbox_write_reg(u32 val, size_t ofs) in mbox_write_reg() argument
72 __raw_writel(val, mbox_base + ofs); in mbox_write_reg()
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