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Searched refs:parent_switch_reg (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-pnx4008/
Dclock.c114 tmp_reg = __raw_readl(clk->parent_switch_reg); in switch_to_dirty_13mhz()
118 __raw_writel(tmp_reg, clk->parent_switch_reg); in switch_to_dirty_13mhz()
120 …while (i++ < 0xFFF && !(__raw_readl(clk->parent_switch_reg) & 1)) ; /*wait for 13'MHz selection st… in switch_to_dirty_13mhz()
122 if (!(__raw_readl(clk->parent_switch_reg) & 1)) { in switch_to_dirty_13mhz()
125 clk->name, __raw_readl(clk->parent_switch_reg)); in switch_to_dirty_13mhz()
147 tmp_reg = __raw_readl(clk->parent_switch_reg); in switch_to_clean_13mhz()
151 __raw_writel(tmp_reg, clk->parent_switch_reg); in switch_to_clean_13mhz()
153 …while (i++ < 0xFFF && (__raw_readl(clk->parent_switch_reg) & 1)) ; /*wait for 13MHz selection stat… in switch_to_clean_13mhz()
155 if (__raw_readl(clk->parent_switch_reg) & 1) { in switch_to_clean_13mhz()
158 clk->name, __raw_readl(clk->parent_switch_reg)); in switch_to_clean_13mhz()
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Dclock.h29 u32 parent_switch_reg; member