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Searched refs:pclk (Results 1 – 25 of 41) sorted by relevance

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/arch/arm/mach-spear3xx/
Dclock.c37 .pclk = &osc_32k_clk,
74 .pclk = &osc_24m_clk,
87 .pclk = &osc_24m_clk,
94 .pclk = &osc_24m_clk,
102 .pclk = &pll1_clk,
129 .pclk = &pll1_clk,
167 .pclk = &pll1_clk,
178 .pclk = &uart_synth_clk,
181 .pclk = &pll3_48m_clk,
213 .pclk = &pll1_clk,
[all …]
/arch/arm/mach-spear6xx/
Dclock.c36 .pclk = &osc_32k_clk,
73 .pclk = &osc_30m_clk,
86 .pclk = &osc_30m_clk,
93 .pclk = &osc_30m_clk,
101 .pclk = &pll1_clk,
128 .pclk = &pll1_clk,
166 .pclk = &pll1_clk,
177 .pclk = &uart_synth_clk,
180 .pclk = &pll3_48m_clk,
221 .pclk = &pll1_clk,
[all …]
Dspear6xx.c67 struct clk *gpt_clk, *pclk; in spear6xx_timer_init() local
77 pclk = clk_get(NULL, pclk_name); in spear6xx_timer_init()
78 if (IS_ERR(pclk)) { in spear6xx_timer_init()
84 clk_set_parent(gpt_clk, pclk); in spear6xx_timer_init()
86 clk_put(pclk); in spear6xx_timer_init()
/arch/avr32/mach-at32ap/
Dpdc.c16 struct clk *pclk, *hclk; in pdc_probe() local
18 pclk = clk_get(&pdev->dev, "pclk"); in pdc_probe()
19 if (IS_ERR(pclk)) { in pdc_probe()
21 return PTR_ERR(pclk); in pdc_probe()
26 clk_put(pclk); in pdc_probe()
30 clk_enable(pclk); in pdc_probe()
Dhsmc.c26 struct clk *pclk; member
220 struct clk *pclk, *mck; in hsmc_probe() local
229 pclk = clk_get(&pdev->dev, "pclk"); in hsmc_probe()
230 if (IS_ERR(pclk)) in hsmc_probe()
231 return PTR_ERR(pclk); in hsmc_probe()
243 clk_enable(pclk); in hsmc_probe()
246 hsmc->pclk = pclk; in hsmc_probe()
261 clk_disable(pclk); in hsmc_probe()
266 clk_put(pclk); in hsmc_probe()
Dintc.c94 struct clk *pclk; in init_IRQ() local
103 pclk = clk_get(&at32_intc0_device.dev, "pclk"); in init_IRQ()
104 if (IS_ERR(pclk)) { in init_IRQ()
109 clk_enable(pclk); in init_IRQ()
/arch/arm/plat-s5p/
Dclock.c210 struct clk *pclk; in s5p_spdif_set_rate() local
213 pclk = clk_get_parent(clk); in s5p_spdif_set_rate()
214 if (IS_ERR(pclk)) in s5p_spdif_set_rate()
217 ret = pclk->ops->set_rate(pclk, rate); in s5p_spdif_set_rate()
218 clk_put(pclk); in s5p_spdif_set_rate()
225 struct clk *pclk; in s5p_spdif_get_rate() local
228 pclk = clk_get_parent(clk); in s5p_spdif_get_rate()
229 if (IS_ERR(pclk)) in s5p_spdif_get_rate()
232 rate = pclk->ops->get_rate(pclk); in s5p_spdif_get_rate()
233 clk_put(pclk); in s5p_spdif_get_rate()
Ds5p-time.c262 unsigned long pclk; in s5p_clockevent_init() local
267 pclk = clk_get_rate(timerclk); in s5p_clockevent_init()
271 clk_set_rate(tscaler, pclk / 2); in s5p_clockevent_init()
272 clk_set_rate(tdiv_event, pclk / 2); in s5p_clockevent_init()
335 unsigned long pclk; in s5p_clocksource_init() local
338 pclk = clk_get_rate(timerclk); in s5p_clocksource_init()
340 clk_set_rate(tdiv_source, pclk / 2); in s5p_clocksource_init()
/arch/arm/plat-spear/
Dclock.c102 list_add(&clk->sibling, &pclk_info->pclk->children); in clk_reparent()
104 clk->pclk = pclk_info->pclk; in clk_reparent()
129 if (clk->pclk) in do_clk_disable()
130 do_clk_disable(clk->pclk); in do_clk_disable()
145 if (clk->pclk) { in do_clk_enable()
146 ret = do_clk_enable(clk->pclk); in do_clk_enable()
153 if (clk->pclk) in do_clk_enable()
154 do_clk_disable(clk->pclk); in do_clk_enable()
246 if (clk->pclk == parent) in clk_set_parent()
253 if (clk->pclk_sel->pclk_info[i].pclk == parent) { in clk_set_parent()
[all …]
/arch/arm/mach-highbank/
Dclock.c50 static struct clk pclk = { .rate = 150000000 }; variable
53 { .clk = &pclk, .con_id = "apb_pclk", },
54 { .clk = &pclk, .dev_id = "sp804", },
56 { .clk = &pclk, .dev_id = "fff36000.serial", },
/arch/arm/mach-s3c2410/
Dcpu-freq.c50 unsigned long hclk, fclk, pclk; in s3c2410_cpufreq_calcdivs() local
70 pdiv = (hclk > cfg->max.pclk) ? 2 : 1; in s3c2410_cpufreq_calcdivs()
71 pclk = hclk / pdiv; in s3c2410_cpufreq_calcdivs()
73 if (pclk > cfg->max.pclk) { in s3c2410_cpufreq_calcdivs()
91 .pclk = 50000000,
146 s3c2410_cpufreq_info.max.pclk = 66500000; in s3c2410a_cpufreq_add()
/arch/arm/plat-samsung/
Dtime.c71 timer_mask_usec_ticks(unsigned long scaler, unsigned long pclk) in timer_mask_usec_ticks() argument
73 unsigned long den = pclk / 1000; in timer_mask_usec_ticks()
181 unsigned long pclk; in s3c2410_timer_setup() local
193 pclk = clk_get_rate(timerclk); in s3c2410_timer_setup()
197 timer_usec_ticks = timer_mask_usec_ticks(6, pclk); in s3c2410_timer_setup()
201 clk_set_rate(tscaler, pclk / 3); in s3c2410_timer_setup()
202 clk_set_rate(tdiv, pclk / 6); in s3c2410_timer_setup()
/arch/avr32/boards/hammerhead/
Dsetup.c132 struct clk *pclk; in set_hw_addr() local
151 pclk = clk_get(&pdev->dev, "pclk"); in set_hw_addr()
153 if (IS_ERR(pclk)) in set_hw_addr()
156 clk_enable(pclk); in set_hw_addr()
162 clk_disable(pclk); in set_hw_addr()
163 clk_put(pclk); in set_hw_addr()
/arch/avr32/boards/mimc200/
Dsetup.c147 struct clk *pclk; in set_hw_addr() local
164 pclk = clk_get(&pdev->dev, "pclk"); in set_hw_addr()
165 if (IS_ERR(pclk)) in set_hw_addr()
168 clk_enable(pclk); in set_hw_addr()
172 clk_disable(pclk); in set_hw_addr()
173 clk_put(pclk); in set_hw_addr()
/arch/arm/plat-s3c24xx/
Dclock.c50 unsigned long pclk) in s3c24xx_setup_clocks() argument
57 clk_p.rate = pclk; in s3c24xx_setup_clocks()
/arch/arm/mach-s3c24xx/
Ds3c2410.c90 unsigned long pclk; in s3c2410_setup_clocks() local
106 pclk = hclk / ((tmp & S3C2410_CLKDIVN_PDIVN) ? 2 : 1); in s3c2410_setup_clocks()
111 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); in s3c2410_setup_clocks()
117 s3c24xx_setup_clocks(fclk, hclk, pclk); in s3c2410_setup_clocks()
Ds3c244x.c86 unsigned long hclk, fclk, pclk; in s3c244x_setup_clocks() local
119 pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN) ? 2 : 1); in s3c244x_setup_clocks()
124 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); in s3c244x_setup_clocks()
126 s3c24xx_setup_clocks(fclk, hclk, pclk); in s3c244x_setup_clocks()
Ds3c2412.c180 unsigned long pclk; in s3c2412_setup_clocks() local
199 pclk = hclk / ((tmp & S3C2412_CLKDIVN_PDIVN) ? 2 : 1); in s3c2412_setup_clocks()
204 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); in s3c2412_setup_clocks()
206 s3c24xx_setup_clocks(fclk, hclk, pclk); in s3c2412_setup_clocks()
/arch/avr32/boards/merisc/
Dsetup.c123 struct clk *pclk; in set_hw_addr() local
136 pclk = clk_get(&pdev->dev, "pclk"); in set_hw_addr()
137 if (IS_ERR(pclk)) in set_hw_addr()
140 clk_enable(pclk); in set_hw_addr()
144 clk_disable(pclk); in set_hw_addr()
145 clk_put(pclk); in set_hw_addr()
/arch/avr32/boards/atstk1000/
Datstk1002.c184 struct clk *pclk; in set_hw_addr() local
201 pclk = clk_get(&pdev->dev, "pclk"); in set_hw_addr()
202 if (IS_ERR(pclk)) in set_hw_addr()
205 clk_enable(pclk); in set_hw_addr()
209 clk_disable(pclk); in set_hw_addr()
210 clk_put(pclk); in set_hw_addr()
/arch/arm/mach-s3c2412/
Dcpu-freq.c63 cfg->freq.hclk, cfg->freq.pclk); in s3c2412_cpufreq_calcdivs()
93 pdiv = (hclk > cfg->max.pclk) ? 2 : 1; in s3c2412_cpufreq_calcdivs()
95 if ((hclk / pdiv) > cfg->max.pclk) in s3c2412_cpufreq_calcdivs()
98 cfg->freq.pclk = hclk / pdiv; in s3c2412_cpufreq_calcdivs()
174 .pclk = 50000000,
221 s3c2412_cpufreq_info.max.pclk = 66000000; in s3c2412_cpufreq_add()
/arch/avr32/boards/atngw100/
Dsetup.c170 struct clk *pclk; in set_hw_addr() local
187 pclk = clk_get(&pdev->dev, "pclk"); in set_hw_addr()
188 if (IS_ERR(pclk)) in set_hw_addr()
191 clk_enable(pclk); in set_hw_addr()
195 clk_disable(pclk); in set_hw_addr()
196 clk_put(pclk); in set_hw_addr()
/arch/arm/mach-mv78xx0/
Dcommon.c77 static void get_pclk_l2clk(int hclk, int core_index, int *pclk, int *l2clk) in get_pclk_l2clk() argument
95 *pclk = ((u64)hclk * (2 + (cfg & 0xf))) >> 1; in get_pclk_l2clk()
101 *l2clk = *pclk / (((cfg >> 4) & 3) + 1); in get_pclk_l2clk()
379 int pclk; in mv78xx0_init() local
385 get_pclk_l2clk(hclk, core_index, &pclk, &l2clk); in mv78xx0_init()
390 printk("PCLK = %dMHz, ", (pclk + 499999) / 1000000); in mv78xx0_init()
/arch/avr32/boards/favr-32/
Dsetup.c191 struct clk *pclk; in set_hw_addr() local
208 pclk = clk_get(&pdev->dev, "pclk"); in set_hw_addr()
209 if (IS_ERR(pclk)) in set_hw_addr()
212 clk_enable(pclk); in set_hw_addr()
216 clk_disable(pclk); in set_hw_addr()
217 clk_put(pclk); in set_hw_addr()
/arch/arm/mach-omap2/
Ddpll3xxx.c596 struct clk *pclk; in omap3_clkoutx2_recalc() local
599 pclk = clk->parent; in omap3_clkoutx2_recalc()
600 while (pclk && !pclk->dpll_data) in omap3_clkoutx2_recalc()
601 pclk = pclk->parent; in omap3_clkoutx2_recalc()
604 WARN_ON(!pclk); in omap3_clkoutx2_recalc()
606 dd = pclk->dpll_data; in omap3_clkoutx2_recalc()

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