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Searched refs:pllsetup (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-lpc32xx/
Dclock.c272 struct clk_pll_setup *pllsetup) in local_clk_find_pll_cfg() argument
282 pllsetup->analog_on = 0; in local_clk_find_pll_cfg()
283 pllsetup->cco_bypass_b15 = 1; in local_clk_find_pll_cfg()
284 pllsetup->direct_output_b14 = 1; in local_clk_find_pll_cfg()
285 pllsetup->fdbk_div_ctrl_b13 = 1; in local_clk_find_pll_cfg()
286 pllsetup->pll_p = pll_postdivs[0]; in local_clk_find_pll_cfg()
287 pllsetup->pll_n = 1; in local_clk_find_pll_cfg()
288 pllsetup->pll_m = 1; in local_clk_find_pll_cfg()
289 return clk_check_pll_setup(ifreq, pllsetup); in local_clk_find_pll_cfg()
291 pllsetup->analog_on = 0; in local_clk_find_pll_cfg()
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Dcommon.c280 u32 clk_check_pll_setup(u32 ifreq, struct clk_pll_setup *pllsetup) in clk_check_pll_setup() argument
294 m = pllsetup->pll_m; in clk_check_pll_setup()
295 n = pllsetup->pll_n; in clk_check_pll_setup()
296 p = pllsetup->pll_p; in clk_check_pll_setup()
298 mode = (pllsetup->cco_bypass_b15 << 2) | in clk_check_pll_setup()
299 (pllsetup->direct_output_b14 << 1) | in clk_check_pll_setup()
300 pllsetup->fdbk_div_ctrl_b13; in clk_check_pll_setup()
Dcommon.h63 extern u32 clk_check_pll_setup(u32 ifreq, struct clk_pll_setup *pllsetup);