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Searched refs:rd (Results 1 – 25 of 143) sorted by relevance

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/arch/arm/mach-s3c24xx/include/mach/
Ddebug-macro.S31 .macro fifo_full_s3c24xx rd, rx
34 mrc p15, 0, \rd, c0, c0
35 and \rd, \rd, #0xff0
36 teq \rd, #0x260
38 mrc p15, 0, \rd, c1, c0
39 tst \rd, #1
40 addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
41 addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
42 bic \rd, \rd, #0xff000
43 ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
[all …]
/arch/arm/plat-samsung/include/plat/
Ddebug-macro.S16 .macro fifo_level_s5pv210 rd, rx
17 ldr \rd, [\rx, # S3C2410_UFSTAT]
18 and \rd, \rd, #S5PV210_UFSTAT_TXMASK
21 .macro fifo_full_s5pv210 rd, rx
22 ldr \rd, [\rx, # S3C2410_UFSTAT]
23 tst \rd, #S5PV210_UFSTAT_TXFULL
29 .macro fifo_level_s3c2440 rd, rx
30 ldr \rd, [\rx, # S3C2410_UFSTAT]
31 and \rd, \rd, #S3C2440_UFSTAT_TXMASK
38 .macro fifo_full_s3c2440 rd, rx
[all …]
/arch/arm/net/
Dbpf_jit_32.h115 #define _AL3_R(op, rd, rn, rm) ((op ## _R) | (rd) << 12 | (rn) << 16 | (rm)) argument
117 #define _AL3_I(op, rd, rn, imm) ((op ## _I) | (rd) << 12 | (rn) << 16 | (imm)) argument
119 #define ARM_ADD_R(rd, rn, rm) _AL3_R(ARM_INST_ADD, rd, rn, rm) argument
120 #define ARM_ADD_I(rd, rn, imm) _AL3_I(ARM_INST_ADD, rd, rn, imm) argument
122 #define ARM_AND_R(rd, rn, rm) _AL3_R(ARM_INST_AND, rd, rn, rm) argument
123 #define ARM_AND_I(rd, rn, imm) _AL3_I(ARM_INST_AND, rd, rn, imm) argument
125 #define ARM_BIC_R(rd, rn, rm) _AL3_R(ARM_INST_BIC, rd, rn, rm) argument
126 #define ARM_BIC_I(rd, rn, imm) _AL3_I(ARM_INST_BIC, rd, rn, imm) argument
146 #define ARM_LSL_R(rd, rn, rm) (_AL3_R(ARM_INST_LSL, rd, 0, rn) | (rm) << 8) argument
147 #define ARM_LSL_I(rd, rn, imm) (_AL3_I(ARM_INST_LSL, rd, 0, rn) | (imm) << 7) argument
[all …]
/arch/arm/mach-msm/include/mach/
Ddebug-macro.S28 .macro senduart, rd, rx
31 str \rd, [\rx, #0x70]
34 strne \rd, [\rx, #0x0C]
38 .macro waituart, rd, rx
41 ldr \rd, [\rx, #0x08]
42 tst \rd, #0x08
45 1001: ldr \rd, [\rx, #0x14]
46 tst \rd, #0x80
50 mov \rd, #0x300
51 str \rd, [\rx, #0x10]
[all …]
/arch/arm/mach-tegra/
Dsleep.S37 .macro cpu_to_halt_reg rd, rcpu
39 subne \rd, \rcpu, #1
40 movne \rd, \rd, lsl #3
41 addne \rd, \rd, #0x14
42 moveq \rd, #0
46 .macro cpu_to_csr_reg rd, rcpu
48 subne \rd, \rcpu, #1
49 movne \rd, \rd, lsl #3
50 addne \rd, \rd, #0x18
51 moveq \rd, #8
[all …]
/arch/sparc/include/asm/
Dhead_32.h19 rd %psr, %l0; b label; rd %wim, %l3; nop;
22 #define SPARC_TFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 1, %l7;
23 #define SPARC_DFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 0, %l7;
24 #define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7;
25 #define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7;
29 rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3;
46 rd %psr, %l0;
50 rd %psr,%l0; \
57 rd %psr,%l0; \
81 mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3;
[all …]
/arch/arm/include/asm/hardware/
Ddebug-8250.S12 .macro senduart,rd,rx
13 strb \rd, [\rx, #UART_TX << UART_SHIFT]
16 .macro busyuart,rd,rx
17 1002: ldrb \rd, [\rx, #UART_LSR << UART_SHIFT]
18 and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
19 teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
23 .macro waituart,rd,rx
25 1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT]
26 tst \rd, #UART_MSR_CTS
Ddebug-pl01x.S15 .macro senduart,rd,rx
16 strb \rd, [\rx, #UART01x_DR]
19 .macro waituart,rd,rx
20 1001: ldr \rd, [\rx, #UART01x_FR]
21 tst \rd, #UART01x_FR_TXFF
25 .macro busyuart,rd,rx
26 1001: ldr \rd, [\rx, #UART01x_FR]
27 tst \rd, #UART01x_FR_BUSY
/arch/arm/mach-shark/include/mach/
Ddebug-macro.S20 .macro senduart,rd,rx
21 strb \rd, [\rx]
24 .macro waituart,rd,rx
27 .macro busyuart,rd,rx
28 mov \rd, #0
29 1001: add \rd, \rd, #1
30 teq \rd, #0x10000
/arch/powerpc/lib/
Dsstep.c469 static void __kprobes set_cr0(struct pt_regs *regs, int rd) in set_cr0() argument
471 long val = regs->gpr[rd]; in set_cr0()
486 static void __kprobes add_with_carry(struct pt_regs *regs, int rd, in add_with_carry() argument
494 regs->gpr[rd] = val; in add_with_carry()
563 unsigned int opcode, ra, rb, rd, spr, u; in emulate_step() local
647 rd = (instr >> 21) & 0x1f; in emulate_step()
651 regs->ccr = (regs->ccr & ~(1UL << (31 - rd))) | in emulate_step()
652 (val << (31 - rd)); in emulate_step()
683 rd = (instr >> 21) & 0x1f; in emulate_step()
689 regs->gpr[rd] = regs->gpr[ra] * (short) instr; in emulate_step()
[all …]
/arch/arm/mach-netx/include/mach/
Ddebug-macro.S22 .macro senduart,rd,rx
23 str \rd, [\rx, #0]
26 .macro busyuart,rd,rx
27 1002: ldr \rd, [\rx, #0x18]
28 tst \rd, #(1 << 3)
32 .macro waituart,rd,rx
33 1001: ldr \rd, [\rx, #0x18]
34 tst \rd, #(1 << 3)
/arch/arm/mach-picoxcell/include/mach/
Ddebug-macro.S22 .macro senduart,rd,rx
23 str \rd, [\rx, #UART_TX << UART_SHIFT]
26 .macro busyuart,rd,rx
27 1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT]
28 and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
29 teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
34 .macro waituart,rd,rx
/arch/unicore32/mm/
Dproc-macros.S41 .macro vma_vm_mm, rd, rn
42 ldw \rd, [\rn+], #VMA_VM_MM
48 .macro vma_vm_flags, rd, rn
49 ldw \rd, [\rn+], #VMA_VM_FLAGS
52 .macro tsk_mm, rd, rn
53 ldw \rd, [\rn+], #TI_TASK
54 ldw \rd, [\rd+], #TSK_ACTIVE_MM
60 .macro act_mm, rd argument
61 andn \rd, sp, #8128
62 andn \rd, \rd, #63
[all …]
/arch/unicore32/kernel/
Ddebug-macro.S17 .macro put_word_ocd, rd, rx=r16
21 movc p1.c1, \rd, #1
29 .macro senduart, rd, rx
30 put_word_ocd \rd, \rx
33 .macro busyuart, rd, rx
36 .macro waituart, rd, rx
73 .macro senduart,rd,rx
74 str \rd, [\rx, #UART_THR_OFFSET]
77 .macro waituart,rd,rx
78 1001: ldr \rd, [\rx, #UART_LSR_OFFSET]
[all …]
/arch/arm/mach-vt8500/include/mach/
Ddebug-macro.S20 .macro senduart,rd,rx
21 strb \rd, [\rx, #0]
24 .macro busyuart,rd,rx
25 1001: ldr \rd, [\rx, #0x1c]
26 ands \rd, \rd, #0x2
30 .macro waituart,rd,rx
/arch/arm/plat-spear/include/plat/
Ddebug-macro.S22 .macro senduart, rd, rx
23 strb \rd, [\rx, #UART01x_DR] @ ASC_TX_BUFFER
26 .macro waituart, rd, rx
27 1001: ldr \rd, [\rx, #UART01x_FR] @ FLAG REGISTER
28 tst \rd, #UART01x_FR_TXFF @ TX_FULL
32 .macro busyuart, rd, rx
33 1002: ldr \rd, [\rx, #UART01x_FR] @ FLAG REGISTER
34 tst \rd, #UART011_FR_TXFE @ TX_EMPTY
/arch/arm/lib/
Dio-writesb.S13 .macro outword, rd argument
15 strb \rd, [r0]
16 mov \rd, \rd, lsr #8
17 strb \rd, [r0]
18 mov \rd, \rd, lsr #8
19 strb \rd, [r0]
20 mov \rd, \rd, lsr #8
21 strb \rd, [r0]
23 mov lr, \rd, lsr #24
25 mov lr, \rd, lsr #16
[all …]
/arch/arm/mach-clps711x/include/mach/
Ddebug-macro.S27 .macro senduart,rd,rx
28 str \rd, [\rx, #0x0480] @ UARTDR
31 .macro waituart,rd,rx
32 1001: ldr \rd, [\rx, #0x0140] @ SYSFLGx
33 tst \rd, #1 << 11 @ UBUSYx
37 .macro busyuart,rd,rx
40 1001: ldr \rd, [\rx, #0x0140] @ SYSFLGx
41 tst \rd, #1 << 8 @ CTS
/arch/arm/mach-h720x/include/mach/
Ddebug-macro.S25 .macro senduart,rd,rx
26 str \rd, [\rx, #0x0] @ UARTDR
30 .macro waituart,rd,rx
31 1001: ldr \rd, [\rx, #0x18] @ UARTFLG
32 tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full
36 .macro busyuart,rd,rx
37 1001: ldr \rd, [\rx, #0x18] @ UARTFLG
38 tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy
/arch/arm/mach-ks8695/include/mach/
Ddebug-macro.S22 .macro senduart, rd, rx
23 str \rd, [\rx, #KS8695_URTH] @ Write to Transmit Holding Register
26 .macro busyuart, rd, rx
27 1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register
28 tst \rd, #URLS_URTE @ Holding & Shift registers empty?
32 .macro waituart, rd, rx
33 1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register
34 tst \rd, #URLS_URTHRE @ Holding Register empty?
/arch/arm/mach-l7200/include/mach/
Ddebug-macro.S24 .macro senduart,rd,rx
25 str \rd, [\rx, #0x0] @ UARTDR
28 .macro waituart,rd,rx
29 1001: ldr \rd, [\rx, #0x18] @ UARTFLG
30 tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full
34 .macro busyuart,rd,rx
35 1001: ldr \rd, [\rx, #0x18] @ UARTFLG
36 tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy
/arch/arm/kernel/
Ddebug.S31 .macro senduart, rd, rx
32 mcr p14, 0, \rd, c0, c5, 0
35 .macro busyuart, rd, rx
42 .macro waituart, rd, rx
43 mov \rd, #0x2000000
45 subs \rd, \rd, #1
55 .macro senduart, rd, rx
56 mcr p14, 0, \rd, c8, c0, 0
59 .macro busyuart, rd, rx
66 .macro waituart, rd, rx
[all …]
/arch/arm/mach-at91/include/mach/
Ddebug-macro.S28 .macro senduart,rd,rx
29 strb \rd, [\rx, #(AT91_DBGU_THR)] @ Write to Transmitter Holding Register
32 .macro waituart,rd,rx
33 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
34 tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit
38 .macro busyuart,rd,rx
39 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
40 tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete
/arch/arm/mach-prima2/include/mach/
Ddebug-macro.S17 .macro senduart,rd,rx
18 str \rd, [\rx, #SIRFSOC_UART_TXFIFO_DATA]
21 .macro busyuart,rd,rx
24 .macro waituart,rd,rx
25 1001: ldr \rd, [\rx, #SIRFSOC_UART_TXFIFO_STATUS]
26 tst \rd, #SIRFSOC_UART1_TXFIFO_EMPTY
/arch/arm/mach-zynq/include/mach/
Ddebug-macro.S25 .macro senduart,rd,rx
26 str \rd, [\rx, #UART_FIFO_OFFSET] @ TXDATA
29 .macro waituart,rd,rx
32 .macro busyuart,rd,rx
33 1002: ldr \rd, [\rx, #UART_SR_OFFSET] @ get status register
34 tst \rd, #UART_SR_TXFULL @

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