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Searched refs:rev (Results 1 – 25 of 118) sorted by relevance

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/arch/arm/mach-imx/
Dcpu-imx31.c23 unsigned int rev; member
25 { .srev = 0x00, .name = "i.MX31(L)", .rev = IMX_CHIP_REVISION_1_0 },
26 { .srev = 0x10, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
27 { .srev = 0x11, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 },
28 { .srev = 0x12, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
29 { .srev = 0x13, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 },
30 { .srev = 0x14, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_2 },
31 { .srev = 0x15, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_2 },
32 { .srev = 0x28, .name = "i.MX31", .rev = IMX_CHIP_REVISION_2_0 },
33 { .srev = 0x29, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_2_0 },
[all …]
Dcpu-imx5.c29 u32 rev = readl(iim_base + IIM_SREV) & 0xff; in get_mx51_srev() local
31 switch (rev) { in get_mx51_srev()
84 u32 rev = readl(iim_base + IIM_SREV) & 0xff; in get_mx53_srev() local
86 switch (rev) { in get_mx53_srev()
118 u32 rev; in get_mx50_srev() local
125 rev = readl(anatop + MX50_HW_ADADIG_DIGPROG); in get_mx50_srev()
126 rev &= 0xff; in get_mx50_srev()
129 if (rev == 0x0) in get_mx50_srev()
131 else if (rev == 0x1) in get_mx50_srev()
Dcpu-imx25.c21 u32 rev; in mx25_read_cpu_rev() local
23 rev = __raw_readl(MX25_IO_ADDRESS(MX25_IIM_BASE_ADDR + MXC_IIMSREV)); in mx25_read_cpu_rev()
24 switch (rev) { in mx25_read_cpu_rev()
Dcpu-imx35.c20 u32 rev; in mx35_read_cpu_rev() local
22 rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV)); in mx35_read_cpu_rev()
23 switch (rev) { in mx35_read_cpu_rev()
/arch/mips/ath79/
Dsetup.c73 u32 rev = 0; in ath79_detect_sys_type() local
81 rev = id >> AR71XX_REV_ID_REVISION_SHIFT; in ath79_detect_sys_type()
82 rev &= AR71XX_REV_ID_REVISION_MASK; in ath79_detect_sys_type()
104 rev = id & AR724X_REV_ID_REVISION_MASK; in ath79_detect_sys_type()
110 rev = id & AR724X_REV_ID_REVISION_MASK; in ath79_detect_sys_type()
116 rev = id & AR724X_REV_ID_REVISION_MASK; in ath79_detect_sys_type()
122 rev = id & AR933X_REV_ID_REVISION_MASK; in ath79_detect_sys_type()
128 rev = id & AR933X_REV_ID_REVISION_MASK; in ath79_detect_sys_type()
133 rev = id >> AR913X_REV_ID_REVISION_SHIFT; in ath79_detect_sys_type()
134 rev &= AR913X_REV_ID_REVISION_MASK; in ath79_detect_sys_type()
[all …]
/arch/arm/mach-orion5x/
Dcommon.c198 u32 dev, rev; in orion5x_find_tclk() local
200 orion5x_pcie_id(&dev, &rev); in orion5x_find_tclk()
227 static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name) in orion5x_id() argument
229 orion5x_pcie_id(dev, rev); in orion5x_id()
232 if (*rev == MV88F5281_REV_D2) { in orion5x_id()
234 } else if (*rev == MV88F5281_REV_D1) { in orion5x_id()
236 } else if (*rev == MV88F5281_REV_D0) { in orion5x_id()
242 if (*rev == MV88F5182_REV_A2) { in orion5x_id()
248 if (*rev == MV88F5181_REV_B1) { in orion5x_id()
250 } else if (*rev == MV88F5181L_REV_A1) { in orion5x_id()
[all …]
Dmpp.c22 u32 rev; in orion5x_variant() local
24 orion5x_pcie_id(&dev, &rev); in orion5x_variant()
36 "(dev %#x rev %#x)\n", dev, rev); in orion5x_variant()
/arch/arm/mach-kirkwood/
Dmpp.c21 u32 dev, rev; in kirkwood_variant() local
23 kirkwood_pcie_id(&dev, &rev); in kirkwood_variant()
25 if ((dev == MV88F6281_DEV_ID && rev >= MV88F6281_REV_A0) || in kirkwood_variant()
28 if (dev == MV88F6192_DEV_ID && rev >= MV88F6192_REV_A0) in kirkwood_variant()
34 "(dev %#x rev %#x)\n", dev, rev); in kirkwood_variant()
Dcommon.c216 u32 dev, rev; in kirkwood_sdio_init() local
218 kirkwood_pcie_id(&dev, &rev); in kirkwood_sdio_init()
219 if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */ in kirkwood_sdio_init()
324 u32 dev, rev; in kirkwood_find_tclk() local
326 kirkwood_pcie_id(&dev, &rev); in kirkwood_find_tclk()
397 u32 dev, rev; in kirkwood_id() local
399 kirkwood_pcie_id(&dev, &rev); in kirkwood_id()
402 if (rev == MV88F6281_REV_Z0) in kirkwood_id()
404 else if (rev == MV88F6281_REV_A0) in kirkwood_id()
406 else if (rev == MV88F6281_REV_A1) in kirkwood_id()
[all …]
Dts41x-setup.c122 u32 dev, rev; in qnap_ts41x_init() local
136 kirkwood_pcie_id(&dev, &rev); in qnap_ts41x_init()
157 u32 dev, rev; in ts41x_pci_init() local
166 kirkwood_pcie_id(&dev, &rev); in ts41x_pci_init()
/arch/arm/mach-omap2/
Dpowerdomains3xxx_data.c298 unsigned int rev; in omap3xxx_powerdomains_init() local
306 rev = omap_rev(); in omap3xxx_powerdomains_init()
308 if (rev == OMAP3430_REV_ES1_0) in omap3xxx_powerdomains_init()
310 else if (rev == OMAP3430_REV_ES2_0 || rev == OMAP3430_REV_ES2_1 || in omap3xxx_powerdomains_init()
311 rev == OMAP3430_REV_ES3_0 || rev == OMAP3630_REV_ES1_0) in omap3xxx_powerdomains_init()
313 else if (rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2 || in omap3xxx_powerdomains_init()
314 rev == OMAP3517_REV_ES1_0 || rev == OMAP3517_REV_ES1_1 || in omap3xxx_powerdomains_init()
315 rev == OMAP3630_REV_ES1_1 || rev == OMAP3630_REV_ES1_2) in omap3xxx_powerdomains_init()
Did.c122 u8 dev_type, rev; in omap2xxx_check_revision() local
128 rev = (idcode >> 28) & 0x0f; in omap2xxx_check_revision()
133 idcode, rev, hawkeye, (idcode >> 1) & 0x7ff); in omap2xxx_check_revision()
293 u8 rev; in omap3xxx_check_revision() local
315 rev = (idcode >> 28) & 0xff; in omap3xxx_check_revision()
320 switch (rev) { in omap3xxx_check_revision()
353 switch (rev) { in omap3xxx_check_revision()
368 switch(rev) { in omap3xxx_check_revision()
385 switch (rev) { in omap3xxx_check_revision()
403 switch (rev) { in omap3xxx_check_revision()
[all …]
Dmcbsp.c178 if (oh->class->rev < MCBSP_CONFIG_TYPE2) { in omap_init_mcbsp()
187 if (id == 1 && oh->class->rev < MCBSP_CONFIG_TYPE4) in omap_init_mcbsp()
191 if (id == 4 && oh->class->rev == MCBSP_CONFIG_TYPE4) in omap_init_mcbsp()
194 if (oh->class->rev == MCBSP_CONFIG_TYPE3) { in omap_init_mcbsp()
201 } else if (oh->class->rev == MCBSP_CONFIG_TYPE4) { in omap_init_mcbsp()
206 if (oh->class->rev >= MCBSP_CONFIG_TYPE3) in omap_init_mcbsp()
/arch/arm/mach-mv78xx0/
Dmpp.c21 u32 dev, rev; in mv78xx0_variant() local
23 mv78xx0_pcie_id(&dev, &rev); in mv78xx0_variant()
25 if (dev == MV78100_DEV_ID && rev >= MV78100_REV_A0) in mv78xx0_variant()
29 "(dev %#x rev %#x)\n", dev, rev); in mv78xx0_variant()
Dcommon.c222 u32 dev, rev; in mv78xx0_ge10_init() local
228 mv78xx0_pcie_id(&dev, &rev); in mv78xx0_ge10_init()
246 u32 dev, rev; in mv78xx0_ge11_init() local
252 mv78xx0_pcie_id(&dev, &rev); in mv78xx0_ge11_init()
344 u32 dev, rev; in mv78xx0_id() local
346 mv78xx0_pcie_id(&dev, &rev); in mv78xx0_id()
349 if (rev == MV78X00_REV_Z0) in mv78xx0_id()
354 if (rev == MV78100_REV_A0) in mv78xx0_id()
356 else if (rev == MV78100_REV_A1) in mv78xx0_id()
361 if (rev == MV78100_REV_A0) in mv78xx0_id()
/arch/powerpc/kvm/
Dbook3s_hv_rm_mmu.c42 void kvmppc_add_revmap_chain(struct kvm *kvm, struct revmap_entry *rev, in kvmppc_add_revmap_chain() argument
56 rev->forw = i; in kvmppc_add_revmap_chain()
57 rev->back = head->back; in kvmppc_add_revmap_chain()
61 rev->forw = rev->back = pte_index; in kvmppc_add_revmap_chain()
71 struct revmap_entry *rev, in remove_revmap_chain() argument
81 ptel = rev->guest_rpte |= rcbits; in remove_revmap_chain()
91 next = real_vmalloc_addr(&kvm->arch.revmap[rev->forw]); in remove_revmap_chain()
92 prev = real_vmalloc_addr(&kvm->arch.revmap[rev->back]); in remove_revmap_chain()
93 next->back = rev->back; in remove_revmap_chain()
94 prev->forw = rev->forw; in remove_revmap_chain()
[all …]
Dbook3s_64_mmu_hv.c46 struct revmap_entry *rev; in kvmppc_alloc_hpt() local
68 rev = vmalloc(sizeof(struct revmap_entry) * HPT_NPTE); in kvmppc_alloc_hpt()
69 if (!rev) { in kvmppc_alloc_hpt()
73 kvm->arch.revmap = rev; in kvmppc_alloc_hpt()
91 vfree(rev); in kvmppc_alloc_hpt()
514 struct revmap_entry *rev; in kvmppc_book3s_hv_page_fault() local
532 rev = &kvm->arch.revmap[index]; in kvmppc_book3s_hv_page_fault()
538 hpte[2] = r = rev->guest_rpte; in kvmppc_book3s_hv_page_fault()
641 rev->guest_rpte != hpte[2]) in kvmppc_book3s_hv_page_fault()
668 kvmppc_add_revmap_chain(kvm, rev, rmap, index, 0); in kvmppc_book3s_hv_page_fault()
[all …]
/arch/arm/mach-ux500/
Did.c43 unsigned int rev = dbx500_revision(); in ux500_print_soc_info() local
47 if (rev == 0x01) in ux500_print_soc_info()
49 else if (rev >= 0xA0) in ux500_print_soc_info()
50 pr_cont("v%d.%d" , (rev >> 4) - 0xA + 1, rev & 0xf); in ux500_print_soc_info()
Dcpu.c82 unsigned int rev = dbx500_revision(); in ux500_get_revision() local
84 if (rev == 0x01) in ux500_get_revision()
86 else if (rev >= 0xA0) in ux500_get_revision()
88 (rev >> 4) - 0xA + 1, rev & 0xf); in ux500_get_revision()
/arch/arm/mach-ks8695/
Dcpu.c48 unsigned long id, rev; in ks8695_processor_info() local
51 rev = __raw_readl(KS8695_MISC_VA + KS8695_RID); in ks8695_processor_info()
53 …printk("KS8695 ID=%04lx SubID=%02lx Revision=%02lx\n", (id & DID_ID), (rev & RID_SUBID), (rev & … in ks8695_processor_info()
/arch/x86/kernel/
Dmicrocode_amd.c85 csig->rev = c->microcode; in collect_cpu_info_amd()
86 pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev); in collect_cpu_info_amd()
146 unsigned int leftover_size, int rev, in get_matching_microcode() argument
176 if (mc_hdr->patch_id <= rev) in get_matching_microcode()
197 u32 rev, dummy; in apply_microcode_amd() local
211 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); in apply_microcode_amd()
214 if (rev != mc_amd->hdr.patch_id) { in apply_microcode_amd()
220 pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev); in apply_microcode_amd()
221 uci->cpu_sig.rev = rev; in apply_microcode_amd()
222 c->microcode = rev; in apply_microcode_amd()
[all …]
Dmicrocode_intel.c92 unsigned int rev; member
158 csig->rev = c->microcode; in collect_cpu_info()
160 cpu_num, csig->sig, csig->pf, csig->rev); in collect_cpu_info()
171 update_match_revision(struct microcode_header_intel *mc_header, int rev) in update_match_revision() argument
173 return (mc_header->rev <= rev) ? 0 : 1; in update_match_revision()
256 get_matching_microcode(struct cpu_signature *cpu_sig, void *mc, int rev) in get_matching_microcode() argument
264 if (!update_match_revision(mc_header, rev)) in get_matching_microcode()
315 if (val[1] != mc_intel->hdr.rev) { in apply_microcode()
317 cpu_num, mc_intel->hdr.rev); in apply_microcode()
326 uci->cpu_sig.rev = val[1]; in apply_microcode()
[all …]
/arch/m68k/mvme16x/
Dconfig.c100 unsigned char rev = *(unsigned char *)MVME162_VERSION_REG; in mvme16x_get_hardware_list() local
103 rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : ""); in mvme16x_get_hardware_list()
105 rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : ""); in mvme16x_get_hardware_list()
107 rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : ""); in mvme16x_get_hardware_list()
312 printk ("\nBRD_ID: %s BUG %x.%x %02x/%02x/%02x\n", id, p->rev>>4, in config_mvme16x()
313 p->rev&0xf, p->yr, p->mth, p->day); in config_mvme16x()
316 unsigned char rev = *(unsigned char *)MVME162_VERSION_REG; in config_mvme16x() local
318 mvme16x_config = rev | MVME16x_CONFIG_GOT_SCCA; in config_mvme16x()
322 rev & MVME16x_CONFIG_GOT_FPU ? "" : "LC"); in config_mvme16x()
324 rev & MVME16x_CONFIG_SPEED_32 ? 32 : 25); in config_mvme16x()
[all …]
/arch/blackfin/
DMakefile90 rev-$(CONFIG_BF_REV_0_0) := 0.0
91 rev-$(CONFIG_BF_REV_0_1) := 0.1
92 rev-$(CONFIG_BF_REV_0_2) := 0.2
93 rev-$(CONFIG_BF_REV_0_3) := 0.3
94 rev-$(CONFIG_BF_REV_0_4) := 0.4
95 rev-$(CONFIG_BF_REV_0_5) := 0.5
96 rev-$(CONFIG_BF_REV_0_6) := 0.6
97 rev-$(CONFIG_BF_REV_NONE) := none
98 rev-$(CONFIG_BF_REV_ANY) := any
100 CPU_REV := $(cpu-y)-$(rev-y)
/arch/powerpc/platforms/85xx/
Dsbc8548.c67 unsigned int *rev; in sbc8548_hw_rev() local
79 rev = ioremap(res.start,sizeof(unsigned int)); in sbc8548_hw_rev()
80 board_rev = (*rev) >> 28; in sbc8548_hw_rev()
81 iounmap(rev); in sbc8548_hw_rev()

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