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Searched refs:rs (Results 1 – 25 of 54) sorted by relevance

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/arch/mips/include/asm/
Duasm.h137 void UASM_i_LA_mostly(u32 **buf, unsigned int rs, long addr);
138 void UASM_i_LA(u32 **buf, unsigned int rs, long addr);
148 # define UASM_i_LW(buf, rs, rt, off) uasm_i_ld(buf, rs, rt, off) argument
149 # define UASM_i_SW(buf, rs, rt, off) uasm_i_sd(buf, rs, rt, off) argument
150 # define UASM_i_SLL(buf, rs, rt, sh) uasm_i_dsll(buf, rs, rt, sh) argument
151 # define UASM_i_SRA(buf, rs, rt, sh) uasm_i_dsra(buf, rs, rt, sh) argument
152 # define UASM_i_SRL(buf, rs, rt, sh) uasm_i_dsrl(buf, rs, rt, sh) argument
153 # define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_dsrl_safe(buf, rs, rt, sh) argument
154 # define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_drotr(buf, rs, rt, sh) argument
157 # define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_daddiu(buf, rs, rt, val) argument
[all …]
Dasm.h169 #define MOVN(rd, rs, rt) \ argument
173 move rd, rs; \
176 #define MOVZ(rd, rs, rt) \ argument
180 move rd, rs; \
185 #define MOVN(rd, rs, rt) \ argument
189 move rd, rs; \
192 #define MOVZ(rd, rs, rt) \ argument
196 move rd, rs; \
202 #define MOVN(rd, rs, rt) \ argument
203 movn rd, rs, rt
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Dinst.h206 unsigned int rs : 5; member
213 unsigned int rs : 5; member
220 unsigned int rs : 5; member
228 unsigned int rs : 5; member
237 unsigned int rs : 5; member
289 unsigned int rs : 5; member
296 unsigned int rs : 5; member
304 unsigned int rs : 5; member
313 unsigned int rs : 5; member
322 unsigned int rs : 5; member
/arch/mips/math-emu/
Dieee754sp.h33 #define SPXSRSXn(rs) \ argument
34 (xe += rs, \
35 xm = (rs > (SP_MBITS+3))?1:((xm) >> (rs)) | ((xm) << (32-(rs)) != 0))
40 #define SPXSRSYn(rs) \ argument
41 (ye+=rs, \
42 ym = (rs > (SP_MBITS+3))?1:((ym) >> (rs)) | ((ym) << (32-(rs)) != 0))
Dieee754dp.h33 #define XDPSRS(v,rs) \ argument
34 ((rs > (DP_MBITS+3))?1:((v) >> (rs)) | ((v) << (64-(rs)) != 0))
/arch/powerpc/kvm/
Demulate.c147 int rs; in kvmppc_emulate_instruction() local
197 rs = get_rs(inst); in kvmppc_emulate_instruction()
199 kvmppc_get_gpr(vcpu, rs), in kvmppc_emulate_instruction()
204 rs = get_rs(inst); in kvmppc_emulate_instruction()
206 kvmppc_get_gpr(vcpu, rs), in kvmppc_emulate_instruction()
211 rs = get_rs(inst); in kvmppc_emulate_instruction()
220 kvmppc_get_gpr(vcpu, rs), in kvmppc_emulate_instruction()
222 kvmppc_set_gpr(vcpu, rs, ea); in kvmppc_emulate_instruction()
307 rs = get_rs(inst); in kvmppc_emulate_instruction()
312 kvmppc_get_gpr(vcpu, rs), in kvmppc_emulate_instruction()
[all …]
D44x_emulate.c44 int rs; in kvmppc_core_emulate_op() local
93 rs = get_rs(inst); in kvmppc_core_emulate_op()
98 vcpu->arch.cpr0_cfgaddr = kvmppc_get_gpr(vcpu, rs); in kvmppc_core_emulate_op()
102 run->dcr.data = kvmppc_get_gpr(vcpu, rs); in kvmppc_core_emulate_op()
114 rs = get_rs(inst); in kvmppc_core_emulate_op()
116 emulated = kvmppc_44x_emul_tlbwe(vcpu, ra, rs, ws); in kvmppc_core_emulate_op()
146 int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs) in kvmppc_core_emulate_mtspr() argument
152 kvmppc_set_pid(vcpu, kvmppc_get_gpr(vcpu, rs)); break; in kvmppc_core_emulate_mtspr()
154 vcpu->arch.mmucr = kvmppc_get_gpr(vcpu, rs); break; in kvmppc_core_emulate_mtspr()
156 vcpu->arch.ccr0 = kvmppc_get_gpr(vcpu, rs); break; in kvmppc_core_emulate_mtspr()
[all …]
Dbook3s_64_mmu.c314 static void kvmppc_mmu_book3s_64_slbmte(struct kvm_vcpu *vcpu, u64 rs, u64 rb) in kvmppc_mmu_book3s_64_slbmte() argument
321 dprintk("KVM MMU: slbmte(0x%llx, 0x%llx)\n", rs, rb); in kvmppc_mmu_book3s_64_slbmte()
334 slbe->large = (rs & SLB_VSID_L) ? 1 : 0; in kvmppc_mmu_book3s_64_slbmte()
335 slbe->tb = (rs & SLB_VSID_B_1T) ? 1 : 0; in kvmppc_mmu_book3s_64_slbmte()
337 slbe->vsid = rs >> 12; in kvmppc_mmu_book3s_64_slbmte()
339 slbe->Ks = (rs & SLB_VSID_KS) ? 1 : 0; in kvmppc_mmu_book3s_64_slbmte()
340 slbe->Kp = (rs & SLB_VSID_KP) ? 1 : 0; in kvmppc_mmu_book3s_64_slbmte()
341 slbe->nx = (rs & SLB_VSID_N) ? 1 : 0; in kvmppc_mmu_book3s_64_slbmte()
342 slbe->class = (rs & SLB_VSID_C) ? 1 : 0; in kvmppc_mmu_book3s_64_slbmte()
345 slbe->origv = rs; in kvmppc_mmu_book3s_64_slbmte()
[all …]
Dbooke_emulate.c43 int rs; in kvmppc_booke_emulate_op() local
71 rs = get_rs(inst); in kvmppc_booke_emulate_op()
73 kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, rs)); in kvmppc_booke_emulate_op()
77 rs = get_rs(inst); in kvmppc_booke_emulate_op()
79 | (kvmppc_get_gpr(vcpu, rs) & MSR_EE); in kvmppc_booke_emulate_op()
102 int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs) in kvmppc_booke_emulate_mtspr() argument
105 ulong spr_val = kvmppc_get_gpr(vcpu, rs); in kvmppc_booke_emulate_mtspr()
Dbook3s_paired_singles.c182 int rs, ulong addr, int ls_type) in kvmppc_emulate_fpr_load() argument
200 emulated = kvmppc_handle_load(run, vcpu, KVM_MMIO_REG_FPR | rs, in kvmppc_emulate_fpr_load()
210 kvm_cvt_fd((u32*)tmp, &vcpu->arch.fpr[rs]); in kvmppc_emulate_fpr_load()
211 vcpu->arch.qpr[rs] = *((u32*)tmp); in kvmppc_emulate_fpr_load()
214 vcpu->arch.fpr[rs] = *((u64*)tmp); in kvmppc_emulate_fpr_load()
226 int rs, ulong addr, int ls_type) in kvmppc_emulate_fpr_store() argument
236 kvm_cvt_df(&vcpu->arch.fpr[rs], (u32*)tmp); in kvmppc_emulate_fpr_store()
241 *((u32*)tmp) = vcpu->arch.fpr[rs]; in kvmppc_emulate_fpr_store()
242 val = vcpu->arch.fpr[rs] & 0xffffffff; in kvmppc_emulate_fpr_store()
246 *((u64*)tmp) = vcpu->arch.fpr[rs]; in kvmppc_emulate_fpr_store()
[all …]
De500_emulate.c73 int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs) in kvmppc_core_emulate_mtspr() argument
77 ulong spr_val = kvmppc_get_gpr(vcpu, rs); in kvmppc_core_emulate_mtspr()
140 emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs); in kvmppc_core_emulate_mtspr()
/arch/mips/kernel/
Dbranch.c48 regs->cp0_epc = regs->regs[insn.r_format.rs]; in __compute_return_epc_for_insn()
62 if ((long)regs->regs[insn.i_format.rs] < 0) { in __compute_return_epc_for_insn()
73 if ((long)regs->regs[insn.i_format.rs] >= 0) { in __compute_return_epc_for_insn()
85 if ((long)regs->regs[insn.i_format.rs] < 0) { in __compute_return_epc_for_insn()
97 if ((long)regs->regs[insn.i_format.rs] >= 0) { in __compute_return_epc_for_insn()
139 if (regs->regs[insn.i_format.rs] == in __compute_return_epc_for_insn()
151 if (regs->regs[insn.i_format.rs] != in __compute_return_epc_for_insn()
164 if ((long)regs->regs[insn.i_format.rs] <= 0) { in __compute_return_epc_for_insn()
176 if ((long)regs->regs[insn.i_format.rs] > 0) { in __compute_return_epc_for_insn()
225 if ((regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt)) in __compute_return_epc_for_insn()
[all …]
/arch/microblaze/include/asm/
Dpage.h187 #define tophys(rd, rs) addik rd, rs, 0 argument
188 #define tovirt(rd, rs) addik rd, rs, 0 argument
194 #define tophys(rd, rs) \ argument
195 addik rd, rs, (CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START)
196 #define tovirt(rd, rs) \ argument
197 addik rd, rs, (CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR)
/arch/mips/txx9/generic/
Dmem_tx4927.c44 unsigned int rs = 0; in tx4927_process_sdccr() local
59 rs = 2048 << sdccr_rs; in tx4927_process_sdccr()
64 return rs * cs * mw * bs; in tx4927_process_sdccr()
/arch/mips/lasat/
Dpicvue.c67 data &= ~picvue->rs; in pvc_read_data()
71 data |= picvue->rs; in pvc_read_data()
97 data |= picvue->rs; in pvc_write()
99 data &= ~picvue->rs; in pvc_write()
104 data &= ~picvue->rs; in pvc_write()
106 data |= picvue->rs; in pvc_write()
Dpicvue.h13 u32 rs; member
/arch/arm/mach-mxs/
Dclock-mx23.c166 #define _CLK_GET_RATE(name, rs) \ argument
171 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##rs); \
174 div = (reg & BM_CLKCTRL_##rs##_DIV_XTAL) >> \
175 BP_CLKCTRL_##rs##_DIV_XTAL; \
177 div = (reg & BM_CLKCTRL_##rs##_DIV_##rs) >> \
178 BP_CLKCTRL_##rs##_DIV_##rs; \
189 #define _CLK_GET_RATE1(name, rs) \ in _CLK_GET_RATE() argument
194 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##rs); \ in _CLK_GET_RATE()
195 div = (reg & BM_CLKCTRL_##rs##_DIV) >> BP_CLKCTRL_##rs##_DIV; \ in _CLK_GET_RATE()
Dclock-mx28.c249 #define _CLK_GET_RATE(name, rs) \ argument
254 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##rs); \
257 div = (reg & BM_CLKCTRL_##rs##_DIV_XTAL) >> \
258 BP_CLKCTRL_##rs##_DIV_XTAL; \
260 div = (reg & BM_CLKCTRL_##rs##_DIV_##rs) >> \
261 BP_CLKCTRL_##rs##_DIV_##rs; \
272 #define _CLK_GET_RATE1(name, rs) \ argument
277 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##rs); \
278 div = (reg & BM_CLKCTRL_##rs##_DIV) >> BP_CLKCTRL_##rs##_DIV; \
437 #define _CLK_SET_RATE_SAIF(name, rs) \ argument
[all …]
/arch/mips/mm/
Duasm.c504 void __uasminit UASM_i_LA_mostly(u32 **buf, unsigned int rs, long addr) in UASM_i_LA_mostly() argument
507 uasm_i_lui(buf, rs, uasm_rel_highest(addr)); in UASM_i_LA_mostly()
509 uasm_i_daddiu(buf, rs, rs, uasm_rel_higher(addr)); in UASM_i_LA_mostly()
511 uasm_i_dsll(buf, rs, rs, 16); in UASM_i_LA_mostly()
512 uasm_i_daddiu(buf, rs, rs, uasm_rel_hi(addr)); in UASM_i_LA_mostly()
513 uasm_i_dsll(buf, rs, rs, 16); in UASM_i_LA_mostly()
515 uasm_i_dsll32(buf, rs, rs, 0); in UASM_i_LA_mostly()
517 uasm_i_lui(buf, rs, uasm_rel_hi(addr)); in UASM_i_LA_mostly()
521 void __uasminit UASM_i_LA(u32 **buf, unsigned int rs, long addr) in UASM_i_LA() argument
523 UASM_i_LA_mostly(buf, rs, addr); in UASM_i_LA()
[all …]
/arch/powerpc/mm/
Dicswx.c219 u32 rs; in acop_handle_fault() local
225 rs = (inst >> (31 - 10)) & 0x1f; in acop_handle_fault()
226 ccw = regs->gpr[rs]; in acop_handle_fault()
/arch/mips/include/asm/octeon/
Dcvmx-asm.h130 asm ("pop %[rd],%[rs]" : [rd] "=d" (result) : [rs] "d" (input))
132 asm ("dpop %[rd],%[rs]" : [rd] "=d" (result) : [rs] "d" (input))
/arch/mips/oprofile/
Dbacktrace.c35 && ip->i_format.rs == 29 && ip->i_format.rt == 31; in is_ra_save_ins()
41 if (ip->i_format.rs != 29 || ip->i_format.rt != 29) in is_sp_move_ins()
55 if (ip->r_format.func == jr_op && ip->r_format.rs == 31) in is_end_of_function_marker()
/arch/powerpc/include/asm/
Dppc_asm.h415 #define tophys(rd,rs) \ argument
416 addis rd,rs,0
418 #define tovirt(rd,rs) \ argument
419 addis rd,rs,0
425 #define tophys(rd,rs) \ argument
426 clrldi rd,rs,2
428 #define tovirt(rd,rs) \ argument
429 rotldi rd,rs,16; \
440 #define tophys(rd,rs) \ argument
441 0: addis rd,rs,-PAGE_OFFSET@h; \
[all …]
/arch/sh/include/asm/
Dptrace_32.h71 unsigned long rs; member
/arch/xtensa/include/asm/
Dpgtable.h377 #define _PGD_INDEX(rt,rs) extui rt, rs, PGDIR_SHIFT, 32-PGDIR_SHIFT
378 #define _PTE_INDEX(rt,rs) extui rt, rs, PAGE_SHIFT, PTRS_PER_PTE_SHIFT

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