Searched refs:rsr (Results 1 – 8 of 8) sorted by relevance
/arch/xtensa/variants/dc232b/include/variant/ |
D | tie-asm.h | 41 rsr \at1, ACCLO // MAC16 accumulator 42 rsr \at2, ACCHI 49 rsr \at1, M0 // MAC16 registers 50 rsr \at2, M1 53 rsr \at1, M2 54 rsr \at2, M3 61 rsr \at1, SCOMPARE1 // conditional store option
|
/arch/xtensa/kernel/ |
D | entry.S | 116 rsr a0, DEPC 128 rsr a3, SAR 136 rsr a2, WINDOWBASE 137 rsr a3, WINDOWSTART 208 rsr a2, SAR # original WINDOWBASE 256 rsr a0, DEPC # get a2 268 rsr a3, SAR 276 rsr a2, WINDOWBASE # don't need to save these, we only 452 rsr a1, DEPC # restore stack pointer 478 1: rsr a0, WINDOWBASE [all …]
|
D | vectors.S | 76 rsr a0, EXCCAUSE # retrieve exception cause 100 rsr a0, EXCCAUSE # retrieve exception cause 212 rsr a3, PS 247 rsr a0, PS 260 rsr a0, EXCCAUSE 300 rsr a0, EXCCAUSE 315 rsr a3, EXCCAUSE 334 rsr a3, EXCSAVE_1
|
D | align.S | 173 rsr a0, DEPC 180 rsr a0, SAR 181 rsr a8, EXCVADDR # load unaligned memory address 200 rsr a7, EPC_1 # load exception address 278 rsr a5, LEND # check if we reached LEND 280 rsr a5, LCOUNT # and LCOUNT != 0 283 rsr a7, LBEG # set PC to LBEGIN 358 rsr a4, LEND # check if we reached LEND 360 rsr a4, LCOUNT # and LCOUNT != 0 363 rsr a7, LBEG # set PC to LBEGIN [all …]
|
D | coprocessor.S | 234 rsr a3, SAR 238 rsr a2, DEPC 251 rsr a3, EXCCAUSE 258 rsr a0, CPENABLE 294 2: rsr a3, EXCCAUSE
|
/arch/powerpc/include/asm/ |
D | mpc5121.h | 17 u32 rsr; /* Reset Status Register */ member
|
/arch/xtensa/boot/boot-redboot/ |
D | bootstrap.S | 57 rsr a5, WINDOWBASE
|
/arch/xtensa/variants/s6000/include/variant/ |
D | tie-asm.h | 41 rsr \at1, BR // boolean option
|