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Searched refs:shared_bus_user (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-tegra/
Dclock.h144 } shared_bus_user; member
Dtegra2_clocks.c1347 list_for_each_entry(c, &bus->shared_bus_list, u.shared_bus_user.node) in tegra_clk_shared_bus_update()
1348 if (c->u.shared_bus_user.enabled) in tegra_clk_shared_bus_update()
1349 rate = max(c->u.shared_bus_user.rate, rate); in tegra_clk_shared_bus_update()
1362 c->u.shared_bus_user.rate = c->parent->max_rate; in tegra_clk_shared_bus_init()
1368 list_add_tail(&c->u.shared_bus_user.node, in tegra_clk_shared_bus_init()
1386 c->u.shared_bus_user.rate = new_rate; in tegra_clk_shared_bus_set_rate()
1406 c->u.shared_bus_user.enabled = true; in tegra_clk_shared_bus_enable()
1421 c->u.shared_bus_user.enabled = false; in tegra_clk_shared_bus_disable()
Dtegra30_clocks.c2867 .u.shared_bus_user = { \