| /arch/mips/kernel/ |
| D | octeon_switch.S | 45 PTR_L t2, TASK_THREAD_INFO(a0)
46 LONG_L t0, ST_OFF(t2)
52 LONG_S t0, ST_OFF(t2)
82 LONG_ADDI t2, a0, THREAD_CVMSEG /* Where to store CVMSEG to */
90 LONG_S t8, 0(t2) /* Store CVMSEG to thread storage */
91 LONG_ADDU t2, LONGSIZE*2 /* Increment loc in thread storage */
93 LONG_S t9, -LONGSIZE(t2)/* Store CVMSEG to thread storage */
115 set_saved_sp t0, t1, t2
140 dmfc2 t2, 0x0200
143 sd t2, OCTEON_CP2_CRC_POLY(a0)
[all …]
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| D | head.S | 45 dsll t2, NASID_SHFT # Same for data nasid
47 or t2, t2, t0 # Physical load address of kernel data
49 dsrl t2, 12 # 4K pfn
51 dsll t2, 6 # Get pfn into place
56 or t0, t0, t2
217 DMT 10 # dmt t2 /* t0, t1 are used by CLI and setup_c0_status() */
223 andi t2, t2, VPECONTROL_TE
224 beqz t2, 2f
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| /arch/mips/netlogic/common/ |
| D | smpboot.S | 61 lui t2, 0x4080 /* Enable Unaligned Access, L2HPE */
62 or t1, t1, t2
63 li t2, ~0xe /* S1RCM */
64 and t1, t1, t2
107 li t2, 0x40000
108 mul t3, t2, t1 /* t3 = node * 0x40000 */
114 li t2, SYS_CPU_COHERENT_BASE(0)
115 add t2, t2, t3 /* t2 <- SYS offset for node */
116 lw t1, 0(t2)
118 sw t1, 0(t2)
[all …]
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| /arch/mips/include/asm/mach-pnx8550/ |
| D | kernel-entry-init.h | 137 srl t2, t3, 22 /* C0_CONFIGPR_IS_SHIFT */
138 andi t2, t2, 0x7 /* C0_CONFIGPR_IS_MASK */
139 addiu t0, t2, 6
140 ori t2, zero, 1
141 sllv t2, t2, t0
149 multu t2, t3 /* max index * max way */
150 mflo t2
151 addiu t2, t2, -1
157 bne t2, zero, pr4450_next_instruction_cache_set
158 addiu t2, t2, -1 /* reduce no of lines to invalidate by one */
[all …]
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| /arch/parisc/lib/ |
| D | fixup.S | 28 .macro get_fault_ip t1 t2 argument
32 mfctl 30,\t2
33 ldw TI_CPU(\t2),\t2
35 extrd,u \t2,63,32,\t2
38 LDREGX \t2(\t1),\t2
42 add,l \t1,\t2,\t1
47 .macro get_fault_ip t1 t2 argument
50 LDREG RT%exception_data(%r1),\t2
52 LDREG EXCDATA_IP(\t2), \t1
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| /arch/alpha/lib/ |
| D | strlen_user.S | 54 subq a1, 7, t2
58 addq t2, t0, t2
62 $loop: ble t2, $limit
64 subq t2, 8, t2
69 $found: negq t1, t2 # clear all but least set bit
70 and t1, t2, t1
72 and t1, 0xf0, t2 # binary search for that set bit
75 cmovne t2, 4, t2
78 addq t2, t3, t2
80 addq v0, t2, v0
[all …]
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| D | stxcpy.S | 46 lda t2, -1 # e1 : build a mask against false zero
47 mskqh t2, a1, t2 # e0 : detection in the src word
49 ornot t1, t2, t2 # .. e1 :
51 cmpbge zero, t2, t8 # .. e1 : bits set iff null found
131 ldq_u t2, 8(a1) # e0 :
135 extqh t2, a1, t4 # e0 :
147 or t6, t2, t2 # e1 : already extracted before
148 cmpbge zero, t2, t8 # e0 : testing eos
156 extql t2, a1, t0 # e0 : position ho-bits of lo word
157 ldq_u t2, 8(a1) # .. e1 : read next high-order source word
[all …]
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| D | ev6-stxcpy.S | 57 lda t2, -1 # E : build a mask against false zero
58 mskqh t2, a1, t2 # U : detection in the src word (stall)
60 ornot t1, t2, t2 # E : (stall)
63 cmpbge zero, t2, t8 # E : bits set iff null found
154 ldq_u t2, 8(a1) # L :
157 extqh t2, a1, t4 # U : (stall on a1)
170 or t6, t2, t2 # E : already extracted before (stall)
171 cmpbge zero, t2, t8 # E : testing eos (stall)
179 extql t2, a1, t0 # U : position ho-bits of lo word
180 ldq_u t2, 8(a1) # U : read next high-order source word
[all …]
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| D | strncpy_from_user.S | 43 lda t2, -1 # e1 : build a mask against false zero
44 mskqh t2, a1, t2 # e0 : detection in the src word
46 ornot t1, t2, t2 # .. e1 :
48 cmpbge zero, t2, t8 # .. e1 : bits set iff null found
112 and a2, 7, t2 # e1 :
115 sll t10, t2, t10 # e0 : t10 = bitmask of last count byte
143 EX( ldq_u t2, 8(a1) ) # e0 : load second src word
146 extqh t2, a1, t4 # e0 :
158 or t6, t2, t2 # .. e1 :
159 cmpbge zero, t2, t8 # e0 : find nulls in second partial
[all …]
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| D | stxncpy.S | 54 lda t2, -1 # e1 : build a mask against false zero
55 mskqh t2, a1, t2 # e0 : detection in the src word
57 ornot t1, t2, t2 # .. e1 :
59 cmpbge zero, t2, t8 # .. e1 : bits set iff null found
126 and a2, 7, t2 # e1 :
129 sll t10, t2, t10 # e0 : t10 = bitmask of last count byte
157 ldq_u t2, 8(a1) # e0 : load second src word
160 extqh t2, a1, t4 # e0 :
173 or t6, t2, t2 # .. e1 :
174 cmpbge zero, t2, t8 # e0 : find nulls in second partial
[all …]
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| D | ev67-strlen_user.S | 69 subq a1, 7, t2 # E :
73 addq t2, t0, t2 # E :
79 $loop: ble t2, $limit # U :
85 subq t2, 8, t2 # E :
89 $found: cttz t1, t2 # U0 :
90 addq v0, t2, v0 # E :
104 subq a1, t2, v0
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| D | ev6-strncpy_from_user.S | 70 lda t2, -1 # E : build a mask against false zero
81 mskqh t2, a1, t2 # U : detection in the src word
87 ornot t1, t2, t2 # E :
90 cmpbge zero, t2, t8 # E : bits set iff null found
177 EX( ldq_u t2, 8(a1) ) # L : load second src word
180 extqh t2, a1, t4 # U :
194 or t6, t2, t2 # E :
195 cmpbge zero, t2, t8 # E : find nulls in second partial
205 extql t2, a1, t1 # U : position hi-bits of lo word
206 EX( ldq_u t2, 8(a1) ) # L : read next high-order source word
[all …]
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| D | ev6-stxncpy.S | 65 lda t2, -1 # E : build a mask against false zero
66 mskqh t2, a1, t2 # U : detection in the src word (stall)
68 ornot t1, t2, t2 # E : (stall)
71 cmpbge zero, t2, t8 # E : bits set iff null found
159 and a2, 7, t2 # E : (stall)
163 sll t10, t2, t10 # U : t10 = bitmask of last count byte
196 ldq_u t2, 8(a1) # L : Latency=3 load second src word
199 extqh t2, a1, t4 # U : (3 cycle stall on t2)
214 or t6, t2, t2 # E : (stall)
216 cmpbge zero, t2, t8 # E : find nulls in second partial
[all …]
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| D | ev67-strrchr.S | 34 and a1, 0xff, t2 # E : 00000000000000ch
40 or t2, t4, a1 # E : 000000000000chch
46 sll a1, 32, t2 # U : 0000chch00000000
50 or t2, t3, t2 # E : 0000chchchch0000
51 or a1, t2, a1 # E : chchchchchchchch
56 xor t0, a1, t2 # E : make bytes == c zero
59 cmpbge zero, t2, t3 # E : bits set iff byte == c
74 xor t0, a1, t2 # E :
77 cmpbge zero, t2, t3 # E : bits set iff byte == c
96 ctlz t8, t2 # U0 : Latency=3 (0x40 for t8=0)
[all …]
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| D | strchr.S | 28 cmpbge zero, t0, t2 # .. e1 : bits set iff byte == zero
36 or t2, t3, t0 # e1 : bits set iff char match or zero match
44 cmpbge zero, t0, t2 # e0 : bits set iff byte == 0
46 or t2, t3, t0 # e0 :
55 and t0, 0xf0, t2 # e0 : binary search for that set bit
58 cmovne t2, 4, t2 # .. e1 :
61 addq t2, t3, t2 # e0 :
63 addq v0, t2, v0 # e0 :
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| D | strrchr.S | 35 xor t0, a1, t2 # e0 : make bytes == c zero
37 cmpbge zero, t2, t3 # e0 : bits set iff byte == c
48 xor t0, a1, t2 # e0 :
50 cmpbge zero, t2, t3 # e0 : bits set iff byte == c
70 and t8, 0xf0, t2 # e0 : binary search for the high bit set
71 cmovne t2, t2, t8 # .. e1 (zdb)
72 cmovne t2, 4, t2 # e0 :
78 addq t2, t1, t1 # e0 :
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| /arch/mips/dec/ |
| D | int-handler.S | 134 lw t2,cpu_fpu_mask
142 and t2,t0
143 bnez t2,fpu # handle FPU immediately
150 1: lw t2,(t1)
152 and t2,t0
153 beqz t2,1b
166 lui t2,(KN03_IOASIC_BASE>>16)&0xffff
183 lui t2,(KN02XA_IOASIC_BASE>>16)&0xffff
186 FEXPORT(kn03_io_int) # 3max+ (t2 loaded earlier)
187 lw t0,IO_REG_SIR(t2) # get status: IOASIC sir
[all …]
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| /arch/mips/lib/ |
| D | csum_partial.S | 25 #undef t2
29 #define t2 $10 macro
104 move t2, a1
181 andi t2, a1, 0x40
195 beqz t2, 1f
196 andi t2, a1, 0x20
204 beqz t2, .Ldo_end_words
214 andi t2, a1, 0x3
228 move a1, t2
253 lbu t2, (src)
[all …]
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| D | memcpy-inatomic.S | 126 #undef t2
130 #define t2 $10 macro
208 sltu t2, len, NBYTES
212 bnez t2, .Lcopy_bytes_checklen
233 EXC( LOAD t2, UNIT(2)(src), .Ll_exc_copy)
244 STORE t2, UNIT(-6)(dst)
268 EXC( LOAD t2, UNIT(2)(src), .Ll_exc_copy)
274 STORE t2, UNIT(2)(dst)
307 #define bits t2
330 ADD t2, zero, NBYTES
[all …]
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| D | memcpy.S | 126 #undef t2
130 #define t2 $10 macro
212 sltu t2, len, NBYTES
216 bnez t2, .Lcopy_bytes_checklen
238 EXC( LOAD t2, UNIT(2)(src), .Ll_exc_copy)
249 EXC( STORE t2, UNIT(-6)(dst), .Ls_exc_p6u)
273 EXC( LOAD t2, UNIT(2)(src), .Ll_exc_copy)
280 EXC( STORE t2, UNIT(2)(dst), .Ls_exc_p2u)
314 #define bits t2
337 ADD t2, zero, NBYTES
[all …]
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| /arch/alpha/include/asm/ |
| D | swab.h | 26 __u64 t0, t1, t2, t3; in __arch_swab32() local
31 t2 = t1 >> 16; /* t2 : 0000000000CCDDAA */ in __arch_swab32()
33 t3 = t2 & 0x00FF00FF; /* t3 : 0000000000CC00AA */ in __arch_swab32()
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| /arch/sparc/lib/ |
| D | memcpy.S | 17 #define MOVE_BIGCHUNK(src, dst, offset, t0, t1, t2, t3, t4, t5, t6, t7) \ argument
19 ldd [%src + (offset) + 0x08], %t2; \
24 st %t2, [%dst + (offset) + 0x08]; \
31 #define MOVE_BIGALIGNCHUNK(src, dst, offset, t0, t1, t2, t3, t4, t5, t6, t7) \ argument
33 ldd [%src + (offset) + 0x08], %t2; \
37 std %t2, [%dst + (offset) + 0x08]; \
41 #define MOVE_LASTCHUNK(src, dst, offset, t0, t1, t2, t3) \ argument
43 ldd [%src - (offset) - 0x08], %t2; \
46 st %t2, [%dst - (offset) - 0x08]; \
49 #define MOVE_LASTALIGNCHUNK(src, dst, offset, t0, t1, t2, t3) \ argument
[all …]
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| /arch/unicore32/mm/ |
| D | proc-macros.S | 137 .macro dcacheline_flush, addr, t1, t2 argument
139 ldw \t2, =_stext @ _stext must ALIGN(4096)
140 add \t2, \t2, \t1 >> #20
141 ldw \t1, [\t2+], #0x0000
142 ldw \t1, [\t2+], #0x1000
143 ldw \t1, [\t2+], #0x2000
144 ldw \t1, [\t2+], #0x3000
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| /arch/mips/cavium-octeon/ |
| D | octeon-memcpy.S | 111 #undef t2
115 #define t2 $10 macro
209 EXC( LOAD t2, UNIT(2)(src), l_exc_copy)
214 EXC( STORE t2, UNIT(2)(dst), s_exc_p14u)
218 EXC( LOAD t2, UNIT(6)(src), l_exc_copy)
222 EXC( STORE t2, UNIT(6)(dst), s_exc_p10u)
228 EXC( LOAD t2, UNIT(-6)(src), l_exc_copy)
232 EXC( STORE t2, UNIT(-6)(dst), s_exc_p6u)
236 EXC( LOAD t2, UNIT(-2)(src), l_exc_copy)
240 EXC( STORE t2, UNIT(-2)(dst), s_exc_p2u)
[all …]
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| /arch/mips/power/ |
| D | hibernate.S | 37 PTR_L t2, PBE_ORIG_ADDRESS(t0) /* destination */
41 REG_S t8, (t2)
43 PTR_ADDIU t2, t2, SZREG
|