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Searched refs:tile (Results 1 – 14 of 14) sorted by relevance

/arch/tile/
DMakefile17 CROSS_COMPILE := $(TILERA_ROOT)/bin/tile-
53 head-y := arch/tile/kernel/head_$(BITS).o
55 libs-y += arch/tile/lib/
59 core-y += arch/tile/
62 INSTALL_PATH ?= $(TILERA_ROOT)/tile/boot
DKconfig58 # so save boot time by presetting this (particularly useful on tile-sim).
125 default "arch/tile/configs/tilepro_defconfig" if !TILEGX
126 default "arch/tile/configs/tilegx_defconfig" if TILEGX
375 source "arch/tile/Kconfig.debug"
383 source "arch/tile/kvm/Kconfig"
/arch/tile/kernel/
Dsmp.c197 HV_Coord tile; in ipi_init() local
201 tile.x = cpu_x(cpu); in ipi_init()
202 tile.y = cpu_y(cpu); in ipi_init()
203 if (hv_get_ipi_pte(tile, KERNEL_PL, &pte) != 0) in ipi_init()
DMakefile9 intvec_$(BITS).o regs_$(BITS).o tile-desc_$(BITS).o
Dvmlinux.lds.S10 OUTPUT_ARCH(tile)
/arch/arm/mach-realview/
DKconfig18 Enable support for the Cortex-A9MPCore tile fitted to the
29 Enable support for the ARM11MPCore tile fitted to the Realview(R)
36 Enable support for the ARM11MPCore Revision B tile on the
39 not compatible with other revisions of the ARM11MPCore tile.
/arch/arm/mach-vexpress/
DKconfig13 tile support or Flattened Device Tree based support options.
16 bool "Versatile Express Cortex-A9x4 tile"
/arch/arm/mach-vexpress/include/mach/
Ddebug-macro.S24 @ - the original A9 core tile, which has MPCore peripherals
/arch/frv/kernel/
Dhead.S554 # split a tile off of the region defined by GR8-GR9
557 # GR4 - IAMPR value representing tile
558 # GR5 - DAMPR value representing tile
559 # GR6 - IAMLR value representing tile
560 # GR7 - DAMLR value representing tile
562 # GR9 region top pointer updated to exclude new tile
Dhead-uc-fr451.S64 movgs gr5,dampr11 ; General I/O tile
67 # need to tile the remaining IAMPR/DAMPR registers to cover as much of the RAM as possible
Dhead-uc-fr401.S250 movgs gr5,dampr7 ; General I/O tile
252 # need to tile the remaining IAMPR/DAMPR registers to cover as much of the RAM as possible
Dhead-mmu-fr451.S248 movgs gr5,damlr11 ; General I/O tile
Dhead-uc-fr555.S240 # need to tile the remaining IAMPR/DAMPR registers to cover as much of the RAM as possible
/arch/tile/include/hv/
Dhypervisor.h514 int hv_get_ipi_pte(HV_Coord tile, int pl, HV_PTE* pte);
557 HV_Errno hv_trigger_ipi(HV_Coord tile, int interrupt);