Searched refs:tsr (Results 1 – 9 of 9) sorted by relevance
145 regs.tsr = 5; /* Set GEE and GIE in TSR */ in kernel_thread()195 regs->tsr |= 0x40; /* set user mode */ in start_thread()
83 OFFSET(REGS_TSR, pt_regs, tsr); in foo()
115 REG_PAIR(tsr, orig_a4);161 #define user_mode(regs) ((((regs)->tsr) & 0x40) != 0)
289 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS)) in update_timer_ints()750 sregs->u.e.tsr = vcpu->arch.tsr; in get_sregs_base()777 vcpu->arch.tsr = sregs->u.e.tsr; in set_sregs_base()952 set_bits(tsr_bits, &vcpu->arch.tsr); in kvmppc_set_tsr_bits()960 clear_bits(tsr_bits, &vcpu->arch.tsr); in kvmppc_clr_tsr_bits()
214 kvmppc_set_gpr(vcpu, rt, vcpu->arch.tsr); break; in kvmppc_booke_emulate_mfspr()
40 pad_A[3], tsr, member
209 __u32 tsr; /* KVM_SREGS_E_UPDATE_TSR */ member
386 ulong tsr; /* we need to perform set/clr_bits() which requires ulong */ member
1455 uint64_t tsr:36; member