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/arch/x86/kvm/
Dtss.h30 u16 t;
31 u16 io_map;
35 u16 prev_task_link;
36 u16 sp0;
37 u16 ss0;
38 u16 sp1;
39 u16 ss1;
40 u16 sp2;
41 u16 ss2;
42 u16 ip;
[all …]
/arch/arm/plat-omap/include/plat/
Dvrfb.h30 u16 xres;
31 u16 yres;
32 u16 xoffset;
33 u16 yoffset;
41 extern void omap_vrfb_adjust_size(u16 *width, u16 *height,
43 extern u32 omap_vrfb_min_phys_size(u16 width, u16 height, u8 bytespp);
44 extern u16 omap_vrfb_max_height(u32 phys_size, u16 width, u8 bytespp);
46 u16 width, u16 height,
48 extern int omap_vrfb_map_angle(struct vrfb *vrfb, u16 height, u8 rot);
54 static inline void omap_vrfb_adjust_size(u16 *width, u16 *height, in omap_vrfb_adjust_size()
[all …]
Dgpio.h167 u16 revision;
168 u16 direction;
169 u16 datain;
170 u16 dataout;
171 u16 set_dataout;
172 u16 clr_dataout;
173 u16 irqstatus;
174 u16 irqstatus2;
175 u16 irqenable;
176 u16 irqenable2;
[all …]
Dgpmc.h106 u16 cs_on; /* Assertion time */
107 u16 cs_rd_off; /* Read deassertion time */
108 u16 cs_wr_off; /* Write deassertion time */
111 u16 adv_on; /* Assertion time */
112 u16 adv_rd_off; /* Read deassertion time */
113 u16 adv_wr_off; /* Write deassertion time */
116 u16 we_on; /* WE assertion time */
117 u16 we_off; /* WE deassertion time */
120 u16 oe_on; /* OE assertion time */
121 u16 oe_off; /* OE deassertion time */
[all …]
/arch/mn10300/unit-asb2364/include/unit/
Dfpga-regs.h11 #define ASB2364_FPGA_REG_RESET_LAN __SYSREG(0xa9001300, u16)
12 #define ASB2364_FPGA_REG_RESET_UART __SYSREG(0xa9001304, u16)
13 #define ASB2364_FPGA_REG_RESET_I2C __SYSREG(0xa9001308, u16)
14 #define ASB2364_FPGA_REG_RESET_USB __SYSREG(0xa900130c, u16)
15 #define ASB2364_FPGA_REG_RESET_AV __SYSREG(0xa9001310, u16)
17 #define ASB2364_FPGA_REG_IRQ(X) __SYSREG(0xa9001510+((X)*4), u16)
24 #define ASB2364_FPGA_REG_MASK(X) __SYSREG(0xa9001590+((X)*4), u16)
31 #define ASB2364_FPGA_REG_CPLD5_SET1 __SYSREG(0xa9002500, u16)
32 #define ASB2364_FPGA_REG_CPLD5_SET2 __SYSREG(0xa9002504, u16)
33 #define ASB2364_FPGA_REG_CPLD6_SET1 __SYSREG(0xa9002600, u16)
[all …]
/arch/arm/mach-omap2/
Dcminst44xx.h14 extern bool omap4_cminst_is_clkdm_in_hwsup(u8 part, s16 inst, u16 cdoffs);
15 extern void omap4_cminst_clkdm_enable_hwsup(u8 part, s16 inst, u16 cdoffs);
16 extern void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs);
17 extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs);
18 extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs);
20 extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs);
23 extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs,
24 u16 clkctrl_offs);
26 extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
27 u16 clkctrl_offs);
[all …]
Dcminst44xx.c73 static u32 _clkctrl_idlest(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) in _clkctrl_idlest()
91 static bool _is_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) in _is_module_ready()
104 u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx) in omap4_cminst_read_inst_reg()
113 void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx) in omap4_cminst_write_inst_reg()
145 u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask) in omap4_cminst_read_inst_reg_bits()
170 static void _clktrctrl_write(u8 c, u8 part, s16 inst, u16 cdoffs) in _clktrctrl_write()
189 bool omap4_cminst_is_clkdm_in_hwsup(u8 part, s16 inst, u16 cdoffs) in omap4_cminst_is_clkdm_in_hwsup()
209 void omap4_cminst_clkdm_enable_hwsup(u8 part, s16 inst, u16 cdoffs) in omap4_cminst_clkdm_enable_hwsup()
224 void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs) in omap4_cminst_clkdm_disable_hwsup()
238 void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs) in omap4_cminst_clkdm_force_sleep()
[all …]
Dmux.h132 u16 reg_offset;
133 u16 gpio;
148 u16 reg_offset;
158 u16 reg_offset;
159 u16 value;
180 u16 enable;
181 u16 idle;
182 u16 off;
258 u16 omap_mux_get_gpio(int gpio);
266 void omap_mux_set_gpio(u16 val, int gpio);
[all …]
/arch/powerpc/include/asm/
Dmpc52xx_psc.h156 u16 status;
157 u16 clock_select;
161 u16 reserved1;
166 u16 buffer_16;
180 u16 isr;
181 u16 imr;
185 u16 reserved4;
218 u16 rfnum; /* PSC + 0x58 */
219 u16 reserved18;
220 u16 tfnum; /* PSC + 0x5c */
[all …]
Dimmap_cpm2.h21 u16 sc_swsr;
46 u16 sc_ceer;
47 u16 sc_cemr;
101 u16 memc_mptpr;
128 u16 sit_tmcntsc;
134 u16 sit_piscr;
142 #define PISCR_PIRQ_MASK ((u16)0xff00)
143 #define PISCR_PS ((u16)0x0080)
144 #define PISCR_PIE ((u16)0x0004)
145 #define PISCR_PTF ((u16)0x0002)
[all …]
Dps3av.h357 u16 version;
358 u16 size; /* size of command packet */
363 u16 version;
364 u16 size;
387 u16 num_of_hdmi; /* out: number of hdmi */
388 u16 num_of_avmulti; /* out: number of avmulti */
389 u16 num_of_spdif; /* out: number of hdmi */
390 u16 reserved;
407 u16 red_x;
408 u16 red_y;
[all …]
/arch/x86/boot/
Dboot.h44 static inline void outb(u8 v, u16 port) in outb()
48 static inline u8 inb(u16 port) in inb()
55 static inline void outw(u16 v, u16 port) in outw()
59 static inline u16 inw(u16 port) in inw()
61 u16 v; in inw()
66 static inline void outl(u32 v, u16 port) in outl()
70 static inline u32 inl(u16 port) in inl()
79 const u16 DELAY_PORT = 0x80; in io_delay()
85 static inline u16 ds(void) in ds()
87 u16 seg; in ds()
[all …]
Dvesa.h17 u16 off, seg;
23 u16 version; /* 4 */
27 u16 total_memory; /* 18 */
35 u16 mode_attr; /* 0 */
37 u16 win_grain; /* 4 */
38 u16 win_size; /* 6 */
39 u16 win_seg[2]; /* 8 */
41 u16 logical_scan; /* 16 */
43 u16 h_res; /* 18 */
44 u16 v_res; /* 20 */
[all …]
Dvideo.h67 u16 mode; /* Mode number (vga= style) */
68 u16 x, y; /* Width, height */
69 u16 depth; /* Bits per pixel, 0 for text mode */
79 u16 xmode_first; /* Unprobed modes to try to call anyway */
80 u16 xmode_n; /* Size of unprobed mode range */
86 int mode_defined(u16 mode); /* video.c */
94 extern u16 video_segment;
100 static inline u8 in_idx(u16 port, u8 index) in in_idx()
106 static inline void out_idx(u8 v, u16 port, u8 index) in out_idx()
112 static inline u8 tst_idx(u8 v, u16 port, u8 index) in tst_idx()
[all …]
/arch/x86/include/asm/
Dintel_scu_ipc.h17 int intel_scu_ipc_ioread8(u16 addr, u8 *data);
20 int intel_scu_ipc_ioread16(u16 addr, u16 *data);
23 int intel_scu_ipc_ioread32(u16 addr, u32 *data);
26 int intel_scu_ipc_readv(u16 *addr, u8 *data, int len);
29 int intel_scu_ipc_iowrite8(u16 addr, u8 data);
32 int intel_scu_ipc_iowrite16(u16 addr, u16 data);
35 int intel_scu_ipc_iowrite32(u16 addr, u32 data);
38 int intel_scu_ipc_writev(u16 *addr, u8 *data, int len);
41 int intel_scu_ipc_update_register(u16 addr, u8 data, u8 mask);
Dsuspend_64.h22 u16 ds, es, fs, gs, ss;
28 u16 gdt_pad;
29 u16 gdt_limit;
31 u16 idt_pad;
32 u16 idt_limit;
34 u16 ldt;
35 u16 tss;
/arch/alpha/include/asm/
Dvga.h16 static inline void scr_writew(u16 val, volatile u16 *addr) in scr_writew()
19 __raw_writew(val, (volatile u16 __iomem *) addr); in scr_writew()
24 static inline u16 scr_readw(volatile const u16 *addr) in scr_readw()
27 return __raw_readw((volatile const u16 __iomem *) addr); in scr_readw()
32 static inline void scr_memsetw(u16 *s, u16 c, unsigned int count) in scr_memsetw()
35 memsetw_io((u16 __iomem *) s, c, count); in scr_memsetw()
41 extern void scr_memcpyw(u16 *d, const u16 *s, unsigned int count);
/arch/s390/include/asm/
Dappldata.h25 u16 diag; /* The DIAGNOSE code X'00DC' */
29 u16 reserved;
30 u16 buffer_length; /* Length of the application data buffer */
45 u16 diag;
49 u16 reserved;
50 u16 buffer_length;
60 u16 prod_fn; /* product function */
62 u16 version_nr; /* version */
63 u16 release_nr; /* release */
64 u16 mod_lvl; /* modification level */
Dcpu_mf.h43 u16 cfvn;
44 u16 auth_ctl;
45 u16 enable_ctl;
46 u16 act_ctl;
47 u16 max_cpu;
48 u16 csvn;
49 u16 max_cg;
50 u16 reserved1;
/arch/s390/kernel/
Dcompat_linux.h167 long sys32_chown16(const char __user * filename, u16 user, u16 group);
168 long sys32_lchown16(const char __user * filename, u16 user, u16 group);
169 long sys32_fchown16(unsigned int fd, u16 user, u16 group);
170 long sys32_setregid16(u16 rgid, u16 egid);
171 long sys32_setgid16(u16 gid);
172 long sys32_setreuid16(u16 ruid, u16 euid);
173 long sys32_setuid16(u16 uid);
174 long sys32_setresuid16(u16 ruid, u16 euid, u16 suid);
175 long sys32_getresuid16(u16 __user *ruid, u16 __user *euid, u16 __user *suid);
176 long sys32_setresgid16(u16 rgid, u16 egid, u16 sgid);
[all …]
/arch/powerpc/boot/
Dcpm-serial.c19 u16 psmr;
21 u16 todr;
22 u16 dsr;
23 u16 scce;
25 u16 sccm;
33 u16 smcmr;
42 u16 rbase;
43 u16 tbase;
46 u16 mrblr;
49 u16 rbptr;
[all …]
/arch/mn10300/include/asm/
Dtimer-regs.h87 #define TM01MD __SYSREG(0xd4003000, u16) /* timer 0:1 mode register */
93 #define TM01BR __SYSREG(0xd4003010, u16) /* timer 0:1 base register */
99 #define TM01BC __SYSREGC(0xd4003020, u16) /* timer 0:1 binary counter */
279 #define TM4BR __SYSREG(0xd4003090, u16) /* timer 4 base register */
280 #define TM5BR __SYSREG(0xd4003092, u16) /* timer 5 base register */
282 #define TM7BR __SYSREG(0xd4003096, u16) /* timer 7 base register */
283 #define TM8BR __SYSREG(0xd4003098, u16) /* timer 8 base register */
284 #define TM9BR __SYSREG(0xd400309a, u16) /* timer 9 base register */
286 #define TM10BR __SYSREG(0xd400309c, u16) /* timer 10 base register */
287 #define TM11BR __SYSREG(0xd400309e, u16) /* timer 11 base register */
[all …]
/arch/sparc/include/asm/
Dvio.h27 u16 stype_env;
48 u16 major;
49 u16 minor;
65 u16 options;
68 u16 resv;
95 u16 __pad2;
110 u16 __pad1;
121 u16 resv1;
147 u16 resv1;
162 u16 sector_size;
[all …]
/arch/tile/include/asm/
Dvga.h24 static inline void scr_writew(u16 val, volatile u16 *addr) in scr_writew()
26 __raw_writew(val, (volatile u16 __iomem *) addr); in scr_writew()
29 static inline u16 scr_readw(volatile const u16 *addr) in scr_readw()
31 return __raw_readw((volatile const u16 __iomem *) addr); in scr_readw()
/arch/blackfin/include/asm/
Dbfin5xx_spi.h48 #define __BFP(m) u16 m; u16 __pad_##m
69 u16 num_chipselect;
71 u16 pin_req[7];
78 u16 ctl_reg;
80 u16 cs_chg_udelay; /* Some devices require 16-bit delays */
82 u16 idle_tx_val;

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