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Searched refs:wmt_mmio_res (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-vt8500/
Ddevices-wm8505.c27 tmp[0] = wmt_mmio_res(WM8505_GOVR_BASE, SZ_512); in wm8505_set_resources()
30 tmp[0] = wmt_mmio_res(WM8505_UART0_BASE, 0x1040); in wm8505_set_resources()
34 tmp[0] = wmt_mmio_res(WM8505_UART1_BASE, 0x1040); in wm8505_set_resources()
38 tmp[0] = wmt_mmio_res(WM8505_UART2_BASE, 0x1040); in wm8505_set_resources()
42 tmp[0] = wmt_mmio_res(WM8505_UART3_BASE, 0x1040); in wm8505_set_resources()
46 tmp[0] = wmt_mmio_res(WM8505_UART4_BASE, 0x1040); in wm8505_set_resources()
50 tmp[0] = wmt_mmio_res(WM8505_UART5_BASE, 0x1040); in wm8505_set_resources()
54 tmp[0] = wmt_mmio_res(WM8505_EHCI_BASE, SZ_512); in wm8505_set_resources()
58 tmp[0] = wmt_mmio_res(WM8505_GEGEA_BASE, SZ_256); in wm8505_set_resources()
61 tmp[0] = wmt_mmio_res(WM8505_PWM_BASE, 0x44); in wm8505_set_resources()
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Ddevices-vt8500.c27 tmp[0] = wmt_mmio_res(VT8500_LCDC_BASE, SZ_1K); in vt8500_set_resources()
31 tmp[0] = wmt_mmio_res(VT8500_UART0_BASE, 0x1040); in vt8500_set_resources()
35 tmp[0] = wmt_mmio_res(VT8500_UART1_BASE, 0x1040); in vt8500_set_resources()
39 tmp[0] = wmt_mmio_res(VT8500_UART2_BASE, 0x1040); in vt8500_set_resources()
43 tmp[0] = wmt_mmio_res(VT8500_UART3_BASE, 0x1040); in vt8500_set_resources()
47 tmp[0] = wmt_mmio_res(VT8500_EHCI_BASE, SZ_512); in vt8500_set_resources()
51 tmp[0] = wmt_mmio_res(VT8500_GEGEA_BASE, SZ_256); in vt8500_set_resources()
54 tmp[0] = wmt_mmio_res(VT8500_PWM_BASE, 0x44); in vt8500_set_resources()
57 tmp[0] = wmt_mmio_res(VT8500_RTC_BASE, 0x2c); in vt8500_set_resources()
Ddevices.h43 static inline struct resource wmt_mmio_res(u32 start, u32 size) in wmt_mmio_res() function