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Searched refs:CR91 (Results 1 – 6 of 6) sorted by relevance

/drivers/video/via/
Ddvi.c212 RegCR91 = viafb_read_reg(VIACR, CR91); in viafb_dvi_sense()
213 viafb_write_reg(CR91, VIACR, 0x1D); in viafb_dvi_sense()
233 RegCR91 = viafb_read_reg(VIACR, CR91); in viafb_dvi_sense()
234 viafb_write_reg(CR91, VIACR, 0x1D); in viafb_dvi_sense()
253 viafb_write_reg(CR91, VIACR, RegCR91); in viafb_dvi_sense()
434 viafb_write_reg_mask(CR91, VIACR, 0x1f, 0x1f); in viafb_dvi_enable()
467 viafb_write_reg_mask(CR91, VIACR, 0, BIT7); in viafb_dvi_enable()
Dlcd.c634 viafb_write_reg_mask(CR91, VIACR, 0xC0, BIT6 + BIT7); in integrated_lvds_disable()
675 viafb_write_reg_mask(CR91, VIACR, 0, BIT0); in integrated_lvds_enable()
677 viafb_write_reg_mask(CR91, VIACR, 0, BIT6 + BIT7); in integrated_lvds_enable()
743 viafb_write_reg_mask(CR91, VIACR, 0x80, 0x80); in viafb_lcd_disable()
766 viafb_write_reg(CR91, VIACR, 0x00); in set_lcd_output_path()
808 viafb_write_reg_mask(CR91, VIACR, 0x00, 0x80); in viafb_lcd_enable()
819 viafb_write_reg_mask(CR91, VIACR, 0x11, 0x11); in lcd_powersequence_off()
824 viafb_write_reg_mask(CR91, VIACR, (u8) data, (u8) mask); in lcd_powersequence_off()
837 viafb_write_reg_mask(CR91, VIACR, 0x11, 0x11); in lcd_powersequence_on()
845 viafb_write_reg_mask(CR91, VIACR, (u8) data, (u8) mask); in lcd_powersequence_on()
Dviamode.c49 {VIACR, CR91, 0xFF, 0xA0}, /* 24/12 bit LVDS Data off */
98 {VIACR, CR91, 0xFF, 0xA0}, /* 24/12 bit LVDS Data off */
137 {VIACR, CR91, 0xFF, 0xA0}, /* 24/12 bit LVDS Data off */
173 {VIACR, CR91, 0xFF, 0x80}, /* 24/12 bit LVDS Data off */
204 {VIACR, CR91, 0xFF, 0x80}, /* 24/12 bit LVDS Data off */
Dshare.h233 #define CR91 0x91 macro
/drivers/video/savage/
Dsavagefb.h170 unsigned char CR90, CR91, CRB0; member
Dsavagefb_driver.c624 reg->CR91 = vga_in8(0x3d5, par); in savage_get_default_par()
777 vga_out8(0x3d5, reg->CR91, par); in savage_set_default_par()
1144 reg->CR91 = reg->CRTC[19] = 0xff & width; in savagefb_decode_var()
1394 vga_out8(0x3d5, reg->CR91, par); in savagefb_set_par_int()