Searched refs:DPLLB_LVDS_P2_CLOCK_DIV_7 (Results 1 – 4 of 4) sorted by relevance
217 #define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ macro
675 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7; in psb_intel_crtc_mode_set()
839 #define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ macro
5270 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7; in i9xx_crtc_mode_set()5883 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7; in ironlake_crtc_mode_set()6914 clock.p2 = dpll & DPLLB_LVDS_P2_CLOCK_DIV_7 ? in intel_crtc_clock_get()