Searched refs:DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 (Results 1 – 4 of 4) sorted by relevance
215 #define DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 (1 << 24) /* i915 */ macro
672 dpll |= DPLL_DAC_SERIAL_P2_CLOCK_DIV_5; in psb_intel_crtc_mode_set()
837 #define DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 (1 << 24) /* i915 */ macro
5267 dpll |= DPLL_DAC_SERIAL_P2_CLOCK_DIV_5; in i9xx_crtc_mode_set()5880 dpll |= DPLL_DAC_SERIAL_P2_CLOCK_DIV_5; in ironlake_crtc_mode_set()6910 clock.p2 = dpll & DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 ? in intel_crtc_clock_get()