Searched refs:EXYNOS_DP_LN2_LINK_TRAINING_CTL (Results 1 – 2 of 2) sorted by relevance
54 #define EXYNOS_DP_LN2_LINK_TRAINING_CTL 0x694 macro
868 writel(reg, dp->reg_base + EXYNOS_DP_LN2_LINK_TRAINING_CTL); in exynos_dp_set_lane2_pre_emphasis()903 writel(reg, dp->reg_base + EXYNOS_DP_LN2_LINK_TRAINING_CTL); in exynos_dp_set_lane2_link_training()935 reg = readl(dp->reg_base + EXYNOS_DP_LN2_LINK_TRAINING_CTL); in exynos_dp_get_lane2_link_training()