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Searched refs:R4 (Results 1 – 16 of 16) sorted by relevance

/drivers/edac/
Dmce_amd.h31 #define R4(x) (((x) >> 4) & 0xf) macro
32 #define R4_MSG(x) ((R4(x) < 9) ? rrrr_msgs[R4(x)] : "Wrong R4!")
Dmce_amd.c162 if (R4(ec) == R4_GEN && LL(ec) == LL_L1) { in f10h_dc_mce()
181 u8 r4 = R4(ec); in f14h_dc_mce()
310 switch (R4(ec)) { in k8_ic_mce()
335 u8 r4 = R4(ec); in f14h_ic_mce()
423 u8 r4 = R4(ec); in amd_decode_bu_mce()
498 u8 r4 = R4(ec); in amd_decode_ls_mce()
/drivers/tty/serial/
Dsunzilog.c203 write_zsreg(channel, R4, regs[R4]); in __load_zsregs()
876 up->curregs[R4] &= ~XCLK_MASK; in sunzilog_convert_to_zs()
877 up->curregs[R4] |= X16CLK; in sunzilog_convert_to_zs()
908 up->curregs[R4] &= ~0x0c; in sunzilog_convert_to_zs()
910 up->curregs[R4] |= SB2; in sunzilog_convert_to_zs()
912 up->curregs[R4] |= SB1; in sunzilog_convert_to_zs()
914 up->curregs[R4] |= PAR_ENAB; in sunzilog_convert_to_zs()
916 up->curregs[R4] &= ~PAR_ENAB; in sunzilog_convert_to_zs()
918 up->curregs[R4] |= PAR_EVEN; in sunzilog_convert_to_zs()
920 up->curregs[R4] &= ~PAR_EVEN; in sunzilog_convert_to_zs()
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Dip22zilog.c184 write_zsreg(channel, R4, regs[R4]); in __load_zsregs()
810 up->curregs[R4] &= ~XCLK_MASK; in ip22zilog_convert_to_zs()
811 up->curregs[R4] |= X16CLK; in ip22zilog_convert_to_zs()
1139 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; in ip22zilog_prepare()
Dpmac_zilog.c150 write_zsreg(uap, R4, regs[R4]); in pmz_load_zsregs()
870 uap->curregs[R4] = X16CLK | SB1; in __pmz_startup()
1020 uap->curregs[R4] = X1CLK; in pmz_convert_to_zs()
1029 uap->curregs[R4] = X16CLK; in pmz_convert_to_zs()
1034 uap->curregs[R4] = X32CLK; in pmz_convert_to_zs()
1039 uap->curregs[R4] = X16CLK; in pmz_convert_to_zs()
Dzs.h63 #define R4 4 macro
Dip22zilog.h42 #define R4 4 macro
Dsunzilog.h34 #define R4 4 macro
Dpmac_zilog.h130 #define R4 4 macro
Dzs.c273 write_zsreg(zport, R4, regs[4]); in load_zsregs()
/drivers/net/hamradio/
Dz8530.h10 #define R4 4 macro
Ddmascc.c762 write_scc(priv, R4, SDLC | X1CLK); in scc_open()
Dscc.c799 wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */ in init_channel()
/drivers/net/wan/
Dz85230.h29 #define R4 4 macro
/drivers/net/wireless/iwlegacy/
D4965.c1583 u32 R4; in il4965_hw_get_temperature() local
1591 R4 = le32_to_cpu(il->card_alive_init.therm_r4[1]); in il4965_hw_get_temperature()
1597 R4 = le32_to_cpu(il->card_alive_init.therm_r4[0]); in il4965_hw_get_temperature()
1608 vt = sign_extend32(R4, 23); in il4965_hw_get_temperature()
/drivers/zorro/
Dzorro.ids141 0b60 Combo 030 R4 [Accelerator]
142 0b70 Combo 030 R4 [Accelerator and SCSI Host Adapter]