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Searched refs:READ_REG_CMD (Results 1 – 11 of 11) sorted by relevance

/drivers/staging/rts5139/
Dsd_cprm.c119 rts51x_add_cmd(chip, READ_REG_CMD, SD_STAT1, 0, 0);
125 rts51x_add_cmd(chip, READ_REG_CMD, reg_addr, 0,
133 rts51x_add_cmd(chip, READ_REG_CMD, reg_addr, 0,
140 rts51x_add_cmd(chip, READ_REG_CMD, SD_CMD5, 0, 0);
249 rts51x_add_cmd(chip, READ_REG_CMD, reg_addr, 0xFF, 0);
254 rts51x_add_cmd(chip, READ_REG_CMD, reg_addr, 0xFF, 0);
257 rts51x_add_cmd(chip, READ_REG_CMD, SD_CMD5, 0xFF, 0);
Dxd.c104 rts51x_add_cmd(chip, READ_REG_CMD, (u16) (XD_ADDRESS1 + i), 0, in xd_read_id()
178 rts51x_add_cmd(chip, READ_REG_CMD, (u16) (XD_PAGE_STATUS + i), in xd_read_redundant()
182 rts51x_add_cmd(chip, READ_REG_CMD, (u16) (XD_RESERVED0 + i), 0, in xd_read_redundant()
185 rts51x_add_cmd(chip, READ_REG_CMD, XD_PARITY, 0, 0); in xd_read_redundant()
218 rts51x_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + offset + i, 0, in xd_read_data_from_ppb()
493 rts51x_add_cmd(chip, READ_REG_CMD, XD_DAT, 0, 0); in reset_xd()
494 rts51x_add_cmd(chip, READ_REG_CMD, XD_CTL, 0, 0); in reset_xd()
1281 rts51x_add_cmd(chip, READ_REG_CMD, XD_DAT, 0, 0); in xd_reset_cmd()
1282 rts51x_add_cmd(chip, READ_REG_CMD, XD_CTL, 0, 0); in xd_reset_cmd()
1323 rts51x_add_cmd(chip, READ_REG_CMD, XD_DAT, 0, 0); in xd_erase_block()
Dsd.c138 rts51x_add_cmd(chip, READ_REG_CMD, SD_STAT1, 0, 0);
145 rts51x_add_cmd(chip, READ_REG_CMD, reg_addr, 0,
153 rts51x_add_cmd(chip, READ_REG_CMD, reg_addr, 0,
2460 rts51x_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2, 0, 0);
2463 rts51x_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 1, 0, 0);
2558 rts51x_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 196, 0xFF, 0);
2559 rts51x_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 212, 0xFF, 0);
2560 rts51x_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 213, 0xFF, 0);
2561 rts51x_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 214, 0xFF, 0);
2562 rts51x_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 215, 0xFF, 0);
Dms.c80 rts51x_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0); in ms_transfer_tpc()
292 rts51x_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0); in ms_read_bytes()
295 rts51x_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, in ms_read_bytes()
298 rts51x_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1, in ms_read_bytes()
2103 rts51x_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0);
2104 rts51x_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0);
2108 rts51x_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
2112 rts51x_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
2114 rts51x_add_cmd(chip, READ_REG_CMD, MS_Device_Type, 0, 0);
2115 rts51x_add_cmd(chip, READ_REG_CMD, MS_4bit_Support, 0, 0);
[all …]
Drts51x_chip.c587 rts51x_add_cmd(chip, READ_REG_CMD, addr, 0, 0); in rts51x_read_register()
800 rts51x_add_cmd(chip, READ_REG_CMD, HS_VSTAOUT, 0, 0); in rts51x_read_phy_register()
Drts51x_chip.h96 #define READ_REG_CMD 0 macro
/drivers/staging/rts_pstor/
Dxd.c96 rtsx_add_cmd(chip, READ_REG_CMD, (u16)(XD_ADDRESS1 + i), 0, 0); in xd_read_id()
151 rtsx_add_cmd(chip, READ_REG_CMD, (u16)(XD_PAGE_STATUS + i), 0, 0); in xd_read_redundant()
153 rtsx_add_cmd(chip, READ_REG_CMD, (u16)(XD_RESERVED0 + i), 0, 0); in xd_read_redundant()
154 rtsx_add_cmd(chip, READ_REG_CMD, XD_PARITY, 0, 0); in xd_read_redundant()
181 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + offset + i, 0, 0); in xd_read_data_from_ppb()
548 rtsx_add_cmd(chip, READ_REG_CMD, XD_DAT, 0, 0); in reset_xd()
549 rtsx_add_cmd(chip, READ_REG_CMD, XD_CTL, 0, 0); in reset_xd()
1182 rtsx_add_cmd(chip, READ_REG_CMD, XD_DAT, 0, 0); in xd_reset_cmd()
1183 rtsx_add_cmd(chip, READ_REG_CMD, XD_CTL, 0, 0); in xd_reset_cmd()
1215 rtsx_add_cmd(chip, READ_REG_CMD, XD_DAT, 0, 0); in xd_erase_block()
Dsd.c192 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); in sd_send_cmd_get_rsp()
197 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); in sd_send_cmd_get_rsp()
202 rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_STAT1, 0, 0); in sd_send_cmd_get_rsp()
2732 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2, 0, 0); in mmc_test_switch_bus()
2734 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 1, 0, 0); in mmc_test_switch_bus()
2813 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 196, 0xFF, 0); in mmc_switch_timing_bus()
2814 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 212, 0xFF, 0); in mmc_switch_timing_bus()
2815 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 213, 0xFF, 0); in mmc_switch_timing_bus()
2816 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 214, 0xFF, 0); in mmc_switch_timing_bus()
2817 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 215, 0xFF, 0); in mmc_switch_timing_bus()
[all …]
Dms.c71 rtsx_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0); in ms_transfer_tpc()
256 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0); in ms_read_bytes()
259 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0); in ms_read_bytes()
261 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1, 0, 0); in ms_read_bytes()
1924 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0); in reset_ms()
1938 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0); in reset_ms()
1939 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0); in reset_ms()
1942 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); in reset_ms()
1946 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); in reset_ms()
1949 rtsx_add_cmd(chip, READ_REG_CMD, MS_Device_Type, 0, 0); in reset_ms()
[all …]
Drtsx_chip.h304 #define READ_REG_CMD 0 macro
Drtsx_chip.c2199 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr++, 0, 0); in rtsx_read_ppbuf()
2214 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr++, 0, 0); in rtsx_read_ppbuf()