Searched refs:SD_CLK_DIVIDE_128 (Results 1 – 4 of 4) sorted by relevance
311 #define SD_CLK_DIVIDE_128 0x80 macro
1849 SD_CLK_DIVIDE_128 | SD_20_MODE | SD_BUS_WIDTH_1);
161 #define SD_CLK_DIVIDE_128 0x80 macro
689 } else if (clk_div == SD_CLK_DIVIDE_128) { in sd_set_clock_divider()2047 SD_CLK_DIVIDE_128 | SD_20_MODE | SD_BUS_WIDTH_1); in sd_prepare_reset()