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Searched refs:SR (Results 1 – 25 of 26) sorted by relevance

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/drivers/macintosh/
Dvia-cuda.c46 #define SR (10*RS) /* Shift register */ macro
267 (void)in_8(&via[SR]); /* clear any left-over data */ in cuda_init_via()
277 (void)in_8(&via[SR]); in cuda_init_via()
288 (void)in_8(&via[SR]); in cuda_init_via()
297 (void)in_8(&via[SR]); in cuda_init_via()
427 out_8(&via[SR], req->data[0]); in cuda_start()
481 (void)in_8(&via[SR]); in cuda_interrupt()
492 (void)in_8(&via[SR]); in cuda_interrupt()
503 (void)in_8(&via[SR]); in cuda_interrupt()
510 out_8(&via[SR], current_req->data[1]); in cuda_interrupt()
[all …]
Dvia-maciisi.c37 #define SR (10*RS) /* Shift register */ macro
167 tmp = via[SR]; /* Clear shift register */ in maciisi_stfu()
203 tmp = via[SR]; in maciisi_init_via()
406 via[SR] = req->data[0]; in maciisi_start()
474 tmp = via[SR]; in maciisi_interrupt()
499 tmp = via[SR]; in maciisi_interrupt()
516 tmp = via[SR]; in maciisi_interrupt()
543 via[SR] = req->data[data_index++]; in maciisi_interrupt()
568 *reply_ptr++ = via[SR]; in maciisi_interrupt()
579 tmp = via[SR]; /* That's what happens in 2.2 */ in maciisi_interrupt()
Dvia-macii.c52 #define SR (10*RS) /* Shift register */ macro
187 x = via[SR]; in macii_init_via()
362 via[SR] = req->data[1]; in macii_start()
414 x = via[SR]; in macii_interrupt()
456 x = via[SR]; in macii_interrupt()
461 via[SR] = req->data[data_index++]; in macii_interrupt()
474 x = via[SR]; in macii_interrupt()
515 x = via[SR]; in macii_interrupt()
Dvia-pmu68k.c58 #define SR (10*RS) /* Shift register */ macro
512 via1[SR] = x; in send_byte()
522 c = via1[SR]; /* resets SR */ in recv_byte()
587 if ((via1[ACR] & SR_OUT) == 0) bite = via1[SR]; in pmu_interrupt()
Dvia-pmu.c90 #define SR (10*RS) /* Shift register */ macro
1185 out_8(&v[SR], x); in send_byte()
1196 in_8(&v[SR]); /* resets SR */ in recv_byte()
1461 bite = in_8(&via[SR]); in pmu_sr_intr()
2435 via[SR] = x; eieio(); in polled_send_byte()
2445 x = via[SR]; eieio(); in polled_recv_byte()
2447 x = via[SR]; eieio(); in polled_recv_byte()
/drivers/video/omap2/dss/
Ddispc.c151 #define SR(reg) \ macro
162 SR(IRQENABLE); in dispc_save_context()
163 SR(CONTROL); in dispc_save_context()
164 SR(CONFIG); in dispc_save_context()
165 SR(LINE_NUMBER); in dispc_save_context()
168 SR(GLOBAL_ALPHA); in dispc_save_context()
170 SR(CONTROL2); in dispc_save_context()
171 SR(CONFIG2); in dispc_save_context()
175 SR(DEFAULT_COLOR(i)); in dispc_save_context()
176 SR(TRANS_COLOR(i)); in dispc_save_context()
[all …]
Ddss.c101 #define SR(reg) \ macro
110 SR(CONTROL); in dss_save_context()
114 SR(SDI_CONTROL); in dss_save_context()
115 SR(PLL_CONTROL); in dss_save_context()
141 #undef SR
/drivers/media/dvb/ngene/
Dngene-core.c99 while (Cur->ngeneBuffer.SR.Flags & 0x80) { in demux_tasklet()
102 if (Cur->ngeneBuffer.SR.Flags & 0x20) in demux_tasklet()
108 Cur->ngeneBuffer.SR. in demux_tasklet()
122 Cur->ngeneBuffer.SR.Flags &= in demux_tasklet()
135 Cur->ngeneBuffer.SR.Flags &= ~0x40; in demux_tasklet()
143 Cur->ngeneBuffer.SR.DTOUpdate = in demux_tasklet()
152 if (Cur->ngeneBuffer.SR.Flags & 0x01) in demux_tasklet()
154 if (Cur->ngeneBuffer.SR.Flags & 0x20) in demux_tasklet()
160 Cur->ngeneBuffer.SR.Clock, in demux_tasklet()
165 Cur->ngeneBuffer.SR.Clock, in demux_tasklet()
[all …]
Dngene.h188 struct BUFFER_STREAM_RESULTS SR; member
/drivers/tty/serial/
Dsc26xx.c147 status = READ_SC_PORT(port, SR); in receive_chars()
202 if (!(READ_SC_PORT(port, SR) & SR_TXRDY)) in transmit_chars()
253 return (READ_SC_PORT(port, SR) & SR_TXRDY) ? TIOCSER_TEMT : 0; in sc26xx_tx_empty()
322 if (!(READ_SC_PORT(port, SR) & SR_TXRDY)) { in sc26xx_start_tx()
391 while ((READ_SC_PORT(port, SR) & ((1 << 3) | (1 << 2))) != 0xc) in sc26xx_set_termios()
485 while ((READ_SC_PORT(port, SR) & ((1 << 3) | (1 << 2))) != 0xc) in sc26xx_set_termios()
548 if (READ_SC_PORT(port, SR) & SR_TXRDY) { in sc26xx_console_putchar()
/drivers/video/via/
Dviamode.h29 unsigned char SR[StdSR]; member
Dhw.c1813 via_write_reg(VIASR, i, VPIT.SR[i - 1]); in hw_init()
/drivers/spi/
Dspi-atmel.c590 status = spi_readl(as, SR); in atmel_spi_interrupt()
632 if (spi_readl(as, SR) & SPI_BIT(TXEMPTY)) in atmel_spi_interrupt()
637 while (spi_readl(as, SR) & SPI_BIT(RDRF)) in atmel_spi_interrupt()
641 spi_readl(as, SR); in atmel_spi_interrupt()
1017 spi_readl(as, SR); in atmel_spi_remove()
/drivers/usb/misc/sisusbvga/
Dsisusb_struct.h71 unsigned char SR[4]; member
Dsisusb_init.c356 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0] | 0x20; in SiS_SetSeqRegs()
360 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i - 1]; in SiS_SetSeqRegs()
/drivers/input/serio/
Dat32psif.c113 status = psif_readl(psif, SR); in psif_interrupt()
140 while (!(psif_readl(psif, SR) & PSIF_BIT(TXEMPTY)) && timeout--) in psif_write()
/drivers/net/ethernet/sfc/
DKconfig30 bool "Solarflare SFC9000-family SR-IOV support"
/drivers/misc/
Datmel-ssc.c109 ssc_readl(ssc->regs, SR); in ssc_probe()
/drivers/clocksource/
Dtcb_clksrc.c173 sr = __raw_readl(dev->regs + ATMEL_TC_REG(2, SR)); in ch2_irq()
/drivers/net/ethernet/chelsio/
DKconfig94 adapters with PCI-E SR-IOV Virtual Functions.
/drivers/pci/
DKconfig42 automatically re-allocate PCI resources if SR-IOV BARs have not
/drivers/video/sis/
Dvstruct.h134 unsigned char SR[4]; member
Dinit.c1839 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0] | 0x20; in SiS_SetSeqRegs()
1853 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i - 1]; in SiS_SetSeqRegs()
/drivers/rtc/
Drtc-at91sam9.c259 sr = rtt_readl(rtc, SR) & (mr >> 16); in at91_rtc_interrupt()
/drivers/mtd/nand/
Datmel_nand.c409 ecc_status = ecc_readl(host->ecc, SR); in atmel_nand_correct()

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