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Searched refs:SR2A (Results 1 – 7 of 7) sorted by relevance

/drivers/video/via/
Ddvi.c58 sr2a = viafb_read_reg(VIASR, SR2A); in viafb_tmds_trasmitter_identify()
59 viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); in viafb_tmds_trasmitter_identify()
65 sr2a = viafb_read_reg(VIASR, SR2A); in viafb_tmds_trasmitter_identify()
66 viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); in viafb_tmds_trasmitter_identify()
127 viafb_write_reg(SR2A, VIASR, sr2a); in viafb_tmds_trasmitter_identify()
132 viafb_write_reg(SR2A, VIASR, sr2a); in viafb_tmds_trasmitter_identify()
340 viafb_write_reg_mask(SR2A, VIASR, 0, BIT4); in dvi_patch_skew_dvp0()
361 viafb_write_reg_mask(SR2A, VIASR, 0x10, BIT4); in dvi_patch_skew_dvp0()
Dviamode.c32 {VIASR, SR2A, 0xFF, 0x00},
68 {VIASR, SR2A, 0x0F, 0x00},
119 {VIASR, SR2A, 0xFF, 0x00}, /* Power Management Control 5 */
153 {VIASR, SR2A, 0xFF, 0x00},
189 {VIASR, SR2A, 0xF0, 0x00},
215 {VIASR, SR2A, 0x0F, 0x00},
Dshare.h80 #define SR2A 0x2A macro
Dviafbdev.c1127 (viafb_read_reg(VIASR, SR2A) & BIT5) >> 4 | in viafb_dvp0_proc_show()
1130 (viafb_read_reg(VIASR, SR2A) & BIT4) >> 3 | in viafb_dvp0_proc_show()
1168 viafb_write_reg_mask(SR2A, VIASR, in viafb_dvp0_proc_write()
1174 viafb_write_reg_mask(SR2A, VIASR, in viafb_dvp0_proc_write()
Dhw.c2074 viafb_write_reg_mask(SR2A, VIASR, in viafb_set_dpa_gfx()
2079 viafb_write_reg_mask(SR2A, VIASR, in viafb_set_dpa_gfx()
/drivers/video/sis/
Dvstruct.h181 unsigned char SR28,SR29,SR2A; member
/drivers/staging/xgifb/
Dvb_init.c143 pVBInfo->MCLKData[pVBInfo->ram_type].SR2A); in XGINew_SetMemoryClock()