| /drivers/scsi/ |
| D | aha152x.c | 892 SETPORT(SSTAT1, 0xef); in aha152x_probe_one()
952 SETPORT(SSTAT1, SELTO); in setup_expected_interrupts()
1312 SETPORT(SSTAT1, 0xef); in reset_ports()
1503 SETPORT(SSTAT1, CLRBUSFREE); in busfree_run()
1648 SETPORT(SSTAT1, SELTO); in busfree_run()
1674 SETPORT(SSTAT1, CLRBUSFREE); in seldo_run()
1675 SETPORT(SSTAT1, CLRPHASECHG); in seldo_run()
1712 SETPORT(SSTAT1, CLRSELTIMO); in selto_run()
1751 SETPORT(SSTAT1, CLRBUSFREE); in seldi_run()
1752 SETPORT(SSTAT1, CLRPHASECHG); in seldi_run()
[all …]
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| D | aha152x.h | 28 #define SSTAT1 (HOSTIOPORT0+0x0c) /* SCSI interrupt status 1 */ macro
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| D | aic7xxx_old.c | 3139 aic_inb(p, SSTAT1), aic_inb(p, SSTAT2)); in aic7xxx_reset_device()
4803 aic_inb(p, SSTAT0), aic_inb(p, SSTAT1)); in aic7xxx_handle_seqint()
4823 aic_inb(p, SSTAT0), aic_inb(p, SSTAT1)); in aic7xxx_handle_seqint()
5651 status = aic_inb(p, SSTAT1); in aic7xxx_handle_scsiint()
5827 aic_inb(p, SSTAT0), aic_inb(p, SSTAT1)); in aic7xxx_handle_scsiint()
6056 CTL_OF_SCB(scb), aic_inb(p, SSTAT1)); in aic7xxx_handle_scsiint()
10377 aic_inb(p, SSTAT0), aic_inb(p, SSTAT1)); in DEF_SCSI_QCMD()
10597 aic_inb(p, SSTAT1), aic_inb(p, SSTAT2)); in __aic7xxx_abort()
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| /drivers/scsi/aic7xxx_old/ |
| D | aic7xxx.seq | 308 test SSTAT1,REQINIT|BUSFREE jz .;
309 test SSTAT1, BUSFREE jnz poll_for_work;
431 test SSTAT1, PHASEMIS jnz u2_phasemis;
513 test SSTAT1, REQINIT jz .;
514 test SSTAT1,PHASEMIS jz data_phase_loop;
526 test SSTAT1, PHASEMIS jnz u2_phasemis;
529 test SSTAT1, REQINIT jz .;
530 test SSTAT1, PHASEMIS jz data_phase_loop;
581 test SSTAT1, PHASEMIS jz .;
668 test SSTAT1,PHASEMIS jz p_command_dma_loop; /* ie. underrun */
[all …]
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| D | aic7xxx_reg.h | 103 #define SSTAT1 0x0c macro
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| D | aic7xxx.reg | 270 * Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT1.
287 register SSTAT1 {
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| /drivers/scsi/aic7xxx/ |
| D | aic7xxx.seq | 683 test SSTAT1,REQINIT|BUSFREE jz .;
684 test SSTAT1, BUSFREE jnz poll_for_work;
896 test SSTAT1,PHASEMIS jz .;
927 test SSTAT1,PHASEMIS jz ultra2_dma_loop;
1115 test SSTAT1,PHASEMIS jz dma_loop; /* ie. underrun */
1266 test SSTAT1, REQINIT jz .;
1268 test SSTAT1,PHASEMIS jz data_phase_loop;
1349 test SSTAT1, REQINIT jnz .;
1443 test SSTAT1, PHASEMIS jz . - 1;
1984 test SSTAT1, REQINIT jz inb_next_wait;
[all …]
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| D | aic7xxx_reg.h_shipped | 54 ahc_print_register(NULL, 0, "SSTAT1", 0x0c, regvalue, cur_col, wrap)
290 #define SSTAT1 0x0c
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| D | aic79xx.seq | 920 test SSTAT1, PHASEMIS jnz p_command_xfer_failed;
1327 test SSTAT1,REQINIT|BUSFREE jz .;
1337 test SSTAT1, BUSFREE jnz idle_loop;
1414 test SSTAT1, SCSIPERR jnz phase_lock;
1441 test SSTAT1, SCSIPERR jnz inb_next_wait;
1741 test SSTAT1, REQINIT jz .;
1758 test SSTAT1, REQINIT jnz .;
1893 test SSTAT1, REQINIT jz snapshot_wait_data_valid;
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| D | aic7xxx_reg_print.c_shipped | 122 return (ahc_print_register(SSTAT1_parse_table, 8, "SSTAT1",
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| D | aic79xx_reg_print.c_shipped | 286 return (ahd_print_register(SSTAT1_parse_table, 8, "SSTAT1",
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| D | aic7xxx.reg | 316 * Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT1.
334 register SSTAT1 {
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| D | aic7xxx_core.c | 1322 && (ahc_inb(ahc, SSTAT1) & SCSIPERR) != 0) { in ahc_handle_seqint()
1555 status = ahc_inb(ahc, SSTAT1) & (SELTO|SCSIRSTI|BUSFREE|SCSIPERR); in ahc_handle_scsiint()
1560 status = ahc_inb(ahc, SSTAT1) in ahc_handle_scsiint()
1643 if ((ahc_inb(ahc, SSTAT1) & SCSIPERR) != 0 in ahc_handle_scsiint()
7218 ahc_sstat1_print(ahc_inb(ahc, SSTAT1), &cur_col, 50); in ahc_dump_card_state()
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| D | aic79xx_reg.h_shipped | 320 ahd_print_register(NULL, 0, "SSTAT1", 0x4c, regvalue, cur_col, wrap)
1643 #define SSTAT1 0x4c
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| D | aic79xx.reg | 1968 register SSTAT1 {
1984 * Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT1.
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| D | aic79xx_core.c | 2354 && (ahd_inb(ahd, SSTAT1) & SELTO) == 0) in ahd_handle_seqint()
2407 status = ahd_inb(ahd, SSTAT1) & (SELTO|SCSIRSTI|BUSFREE|SCSIPERR); in ahd_handle_scsiint()
9789 ahd_sstat1_print(ahd_inb(ahd, SSTAT1), &cur_col, 50); in ahd_dump_card_state()
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