/drivers/usb/host/ |
D | ohci-tmio.c | 69 void __iomem *ccr; member 89 tmio_iowrite16(pm, tmio->ccr + CCR_PM); in tmio_write_pm() 111 tmio_iowrite8(0, tmio->ccr + CCR_INTC); in tmio_stop_hc() 112 tmio_iowrite8(0, tmio->ccr + CCR_ILME); in tmio_stop_hc() 113 tmio_iowrite16(0, tmio->ccr + CCR_BASE); in tmio_stop_hc() 114 tmio_iowrite16(0, tmio->ccr + CCR_BASE + 2); in tmio_stop_hc() 115 tmio_iowrite16(pm, tmio->ccr + CCR_PM); in tmio_stop_hc() 125 tmio_iowrite16(base, tmio->ccr + CCR_BASE); in tmio_start_hc() 126 tmio_iowrite16(base >> 16, tmio->ccr + CCR_BASE + 2); in tmio_start_hc() 127 tmio_iowrite8(1, tmio->ccr + CCR_ILME); in tmio_start_hc() [all …]
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/drivers/net/can/sja1000/ |
D | peak_pcmcia.c | 149 u8 ccr; member 232 if (card->ccr == v) in pcan_write_reg() 234 card->ccr = v; in pcan_write_reg() 352 u8 ccr = card->ccr; in pcan_set_leds() local 358 ccr &= ~PCC_CCR_LED_MASK_CHAN(i); in pcan_set_leds() 360 ccr |= PCC_CCR_LED_CHAN(state, i); in pcan_set_leds() 364 pcan_write_reg(card, PCC_CCR, ccr); in pcan_set_leds() 389 u8 ccr; in pcan_led_timer() local 391 ccr = card->ccr; in pcan_led_timer() 394 ccr &= ~PCC_CCR_LED_MASK_CHAN(i); in pcan_led_timer() [all …]
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/drivers/mtd/nand/ |
D | ndfc.c | 51 uint32_t ccr; in ndfc_select_chip() local 55 ccr = in_be32(ndfc->ndfcbase + NDFC_CCR); in ndfc_select_chip() 57 ccr &= ~NDFC_CCR_BS_MASK; in ndfc_select_chip() 58 ccr |= NDFC_CCR_BS(chip + ndfc->chip_select); in ndfc_select_chip() 60 ccr |= NDFC_CCR_RESET_CE; in ndfc_select_chip() 61 out_be32(ndfc->ndfcbase + NDFC_CCR, ccr); in ndfc_select_chip() 88 uint32_t ccr; in ndfc_enable_hwecc() local 92 ccr = in_be32(ndfc->ndfcbase + NDFC_CCR); in ndfc_enable_hwecc() 93 ccr |= NDFC_CCR_RESET_ECC; in ndfc_enable_hwecc() 94 out_be32(ndfc->ndfcbase + NDFC_CCR, ccr); in ndfc_enable_hwecc() [all …]
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D | tmio_nand.c | 111 void __iomem *ccr; member 329 tmio_iowrite8(0x81, tmio->ccr + CCR_ICC); in tmio_hw_init() 332 tmio_iowrite16(tmio->fcr_base, tmio->ccr + CCR_BASE); in tmio_hw_init() 333 tmio_iowrite16(tmio->fcr_base >> 16, tmio->ccr + CCR_BASE + 2); in tmio_hw_init() 336 tmio_iowrite8(0x02, tmio->ccr + CCR_COMMAND); in tmio_hw_init() 340 tmio_iowrite8(0x02, tmio->ccr + CCR_NFPSC); in tmio_hw_init() 343 tmio_iowrite8(0x02, tmio->ccr + CCR_NFDC); in tmio_hw_init() 375 struct resource *ccr = platform_get_resource(dev, in tmio_probe() local 400 tmio->ccr = ioremap(ccr->start, resource_size(ccr)); in tmio_probe() 401 if (!tmio->ccr) { in tmio_probe() [all …]
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/drivers/dma/ |
D | txx9dmac.h | 170 u32 ccr; member 242 return (dc->ccr & TXX9_DMA_CCR_INTENT) != 0; in txx9dmac_chan_INTENT() 247 dc->ccr |= TXX9_DMA_CCR_INTENT; in txx9dmac_chan_set_INTENT() 257 dc->ccr |= TXX9_DMA_CCR_SMPCHN; in txx9dmac_chan_set_SMPCHN() 262 u32 sair, u32 dair, u32 ccr) in txx9dmac_desc_set_nosimple() argument 292 u32 sai, u32 dai, u32 ccr) in txx9dmac_desc_set_nosimple() argument 297 desc->hwdesc.CCR = ccr; in txx9dmac_desc_set_nosimple() 301 desc->hwdesc32.CCR = ccr; in txx9dmac_desc_set_nosimple()
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D | pl330.c | 255 #define BRST_LEN(ccr) ((((ccr) >> CC_SRCBRSTLEN_SHFT) & 0xf) + 1) argument 256 #define BRST_SIZE(ccr) (1 << (((ccr) >> CC_SRCBRSTSIZE_SHFT) & 0x7)) argument 258 #define BYTE_TO_BURST(b, ccr) ((b) / BRST_SIZE(ccr) / BRST_LEN(ccr)) argument 259 #define BURST_TO_BYTE(c, ccr) ((c) * BRST_SIZE(ccr) * BRST_LEN(ccr)) argument 439 u32 ccr; member 1410 u32 ccr = pxs->ccr; in _setup_loops() local 1411 unsigned long c, bursts = BYTE_TO_BURST(x->bytes, ccr); in _setup_loops() 1455 off += _emit_MOV(dry_run, &buf[off], CCR, pxs->ccr); in _setup_req() 1460 if (x->bytes % (BRST_SIZE(pxs->ccr) * BRST_LEN(pxs->ccr))) in _setup_req() 1479 u32 ccr = 0; in _prepare_ccr() local [all …]
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D | txx9dmac.c | 369 channel64_writel(dc, CCR, dc->ccr); in txx9dmac_dostart() 390 channel32_writel(dc, CCR, dc->ccr); in txx9dmac_dostart() 395 channel32_writel(dc, CCR, dc->ccr); in txx9dmac_dostart() 790 dc->ccr | TXX9_DMA_CCR_XFACT); in txx9dmac_prep_dma_memcpy() 796 dc->ccr | TXX9_DMA_CCR_XFACT); in txx9dmac_prep_dma_memcpy() 898 dc->ccr | TXX9_DMA_CCR_XFACT); in txx9dmac_prep_slave_sg() 1039 dc->ccr = TXX9_DMA_CCR_IMMCHN | TXX9_DMA_CCR_INTENE | CCR_LE; in txx9dmac_alloc_chan_resources() 1041 if (!txx9_dma_have_SMPCHN() || (dc->ccr & TXX9_DMA_CCR_SMPCHN)) in txx9dmac_alloc_chan_resources() 1042 dc->ccr |= TXX9_DMA_CCR_INTENC; in txx9dmac_alloc_chan_resources() 1046 dc->ccr |= TXX9_DMA_CCR_XFSZ_X8; in txx9dmac_alloc_chan_resources() [all …]
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/drivers/mfd/ |
D | tc6393xb.c | 102 u16 ccr; member 226 u16 ccr; in tc6393xb_ohci_enable() local 231 ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); in tc6393xb_ohci_enable() 232 ccr |= SCR_CCR_USBCK; in tc6393xb_ohci_enable() 233 tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); in tc6393xb_ohci_enable() 248 u16 ccr; in tc6393xb_ohci_disable() local 257 ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); in tc6393xb_ohci_disable() 258 ccr &= ~SCR_CCR_USBCK; in tc6393xb_ohci_disable() 259 tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); in tc6393xb_ohci_disable() 270 u16 ccr; in tc6393xb_fb_enable() local [all …]
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/drivers/spi/ |
D | spi-mpc512x-psc.c | 83 u32 ccr; in mpc512x_psc_spi_activate_cs() local 105 ccr = in_be32(&psc->ccr); in mpc512x_psc_spi_activate_cs() 106 ccr &= 0xFF000000; in mpc512x_psc_spi_activate_cs() 112 ccr |= (((bclkdiv & 0xff) << 16) | (((bclkdiv >> 8) & 0xff) << 8)); in mpc512x_psc_spi_activate_cs() 113 out_be32(&psc->ccr, ccr); in mpc512x_psc_spi_activate_cs() 334 u32 ccr; in mpc512x_psc_spi_port_config() local 367 ccr = in_be32(&psc->ccr); in mpc512x_psc_spi_port_config() 368 ccr &= 0xFF000000; in mpc512x_psc_spi_port_config() 370 ccr |= (((bclkdiv & 0xff) << 16) | (((bclkdiv >> 8) & 0xff) << 8)); in mpc512x_psc_spi_port_config() 371 out_be32(&psc->ccr, ccr); in mpc512x_psc_spi_port_config()
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D | spi-mpc52xx-psc.c | 83 u16 ccr; in mpc52xx_psc_spi_activate_cs() local 107 ccr = in_be16((u16 __iomem *)&psc->ccr); in mpc52xx_psc_spi_activate_cs() 108 ccr &= 0xFF00; in mpc52xx_psc_spi_activate_cs() 110 ccr |= (MCLK / cs->speed_hz - 1) & 0xFF; in mpc52xx_psc_spi_activate_cs() 112 ccr |= (MCLK / 1000000 - 1) & 0xFF; in mpc52xx_psc_spi_activate_cs() 113 out_be16((u16 __iomem *)&psc->ccr, ccr); in mpc52xx_psc_spi_activate_cs() 340 out_be16((u16 __iomem *)&psc->ccr, 0x070F); /* default SPI Clk 1MHz */ in mpc52xx_psc_spi_port_config()
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/drivers/video/ |
D | tmiofb.c | 204 void __iomem *ccr; member 257 tmio_iowrite16(0, par->ccr + CCR_UGCC); in tmiofb_hw_stop() 282 tmio_iowrite16(0x003a, par->ccr + CCR_UGCC); in tmiofb_hw_init() 283 tmio_iowrite16(0x003a, par->ccr + CCR_GCC); in tmiofb_hw_init() 284 tmio_iowrite16(0x3f00, par->ccr + CCR_USC); in tmiofb_hw_init() 288 tmio_iowrite16(0x0000, par->ccr + CCR_USC); in tmiofb_hw_init() 289 tmio_iowrite16(base >> 16, par->ccr + CCR_BASEH); in tmiofb_hw_init() 290 tmio_iowrite16(base, par->ccr + CCR_BASEL); in tmiofb_hw_init() 291 tmio_iowrite16(0x0002, par->ccr + CCR_CMD); /* base address enable */ in tmiofb_hw_init() 292 tmio_iowrite16(0x40a8, par->ccr + CCR_VRAMRTC); /* VRAMRC, VRAMTC */ in tmiofb_hw_init() [all …]
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D | cg14.c | 107 u8 ccr; /* Clock Control Reg */ member 141 u8 ccr; /* Cursor Control Reg */ member
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/drivers/pcmcia/ |
D | pxa2xx_sharpsl.c | 115 unsigned short cpr, ncpr, ccr, nccr, mcr, nmcr, imr, nimr; in sharpsl_pcmcia_configure_socket() local 135 nccr = (ccr = read_scoop_reg(scoop, SCOOP_CCR)) & ~0x0080; in sharpsl_pcmcia_configure_socket() 172 if (ccr != nccr) in sharpsl_pcmcia_configure_socket()
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/drivers/tty/ |
D | cyclades.c | 363 void __iomem *ccr = base_addr + (CyCCR << index); in __cyy_issue_cmd() local 368 if (readb(ccr) == 0) in __cyy_issue_cmd() 378 cy_writeb(ccr, cmd); in __cyy_issue_cmd()
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