Searched refs:cfg2 (Results 1 – 9 of 9) sorted by relevance
| /drivers/staging/comedi/drivers/ |
| D | ni_at_ao.c | 176 unsigned short cfg2; member
323 devpriv->cfg2 = 0; in atao_reset()
324 outw(devpriv->cfg2, dev->iobase + ATAO_CFG2); in atao_reset()
461 outw(devpriv->cfg2 | ((bit & bitstring) ? SDATA : 0), in atao_calib_insn_write()
463 outw(devpriv->cfg2 | SCLK | ((bit & bitstring) ? SDATA : 0), in atao_calib_insn_write()
467 outw(devpriv->cfg2 | (((chan >> 3) + 1) << 14), in atao_calib_insn_write()
469 outw(devpriv->cfg2, dev->iobase + ATAO_CFG2); in atao_calib_insn_write()
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| /drivers/media/video/ |
| D | atmel-isi.c | 121 u32 cfg2, cr; in configure_geometry() local
147 cfg2 = isi_readl(isi, ISI_CFG2); in configure_geometry()
148 cfg2 |= cr; in configure_geometry()
150 cfg2 &= ~(ISI_CFG2_IM_HSIZE_MASK); in configure_geometry()
151 cfg2 |= ((width - 1) << ISI_CFG2_IM_HSIZE_OFFSET) & in configure_geometry()
154 cfg2 &= ~(ISI_CFG2_IM_VSIZE_MASK); in configure_geometry()
155 cfg2 |= ((height - 1) << ISI_CFG2_IM_VSIZE_OFFSET) in configure_geometry()
157 isi_writel(isi, ISI_CFG2, cfg2); in configure_geometry()
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| /drivers/staging/et131x/ |
| D | et131x.c | 1012 u32 cfg2; in et1310_config_mac_regs2() local
1018 cfg2 = readl(&mac->cfg2); in et1310_config_mac_regs2()
1022 cfg2 &= ~0x300; in et1310_config_mac_regs2()
1024 cfg2 |= 0x200; in et1310_config_mac_regs2()
1028 cfg2 |= 0x100; in et1310_config_mac_regs2()
1044 cfg2 |= 0x7016; in et1310_config_mac_regs2()
1045 cfg2 &= ~0x0021; in et1310_config_mac_regs2()
1049 cfg2 |= 0x01; in et1310_config_mac_regs2()
1056 writel(cfg2, &mac->cfg2); in et1310_config_mac_regs2()
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| D | et131x.h | 1127 u32 cfg2; /* 0x5004 */ member
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| /drivers/staging/rts_pstor/ |
| D | sd.c | 3352 u8 cfg2; in sd_rw() local
3449 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END | in sd_rw()
3453 cfg2 |= SD_NO_CHECK_WAIT_CRC_TO; in sd_rw()
3456 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, cfg2); in sd_rw()
3481 cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END | in sd_rw()
3485 cfg2 |= SD_NO_CHECK_WAIT_CRC_TO; in sd_rw()
3488 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, cfg2); in sd_rw()
3524 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END | in sd_rw()
3528 cfg2 |= SD_NO_CHECK_WAIT_CRC_TO; in sd_rw()
3531 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, cfg2); in sd_rw()
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| /drivers/hwmon/ |
| D | adt7462.c | 222 u8 cfg2; member
803 data->cfg2 = i2c_smbus_read_byte_data(client, ADT7462_REG_CFG2); in adt7462_update_device()
1105 return sprintf(buf, "%d\n", (data->cfg2 & ADT7462_FSPD_MASK ? 1 : 0)); in show_force_pwm_max()
1127 data->cfg2 = reg; in set_force_pwm_max()
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| /drivers/net/ethernet/realtek/ |
| D | r8169.c | 6083 u8 cfg2; in rtl_try_msi() local
6085 cfg2 = RTL_R8(Config2) & ~MSIEnable; in rtl_try_msi()
6090 cfg2 |= MSIEnable; in rtl_try_msi()
6095 RTL_W8(Config2, cfg2); in rtl_try_msi()
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| /drivers/net/ethernet/broadcom/ |
| D | tg3.c | 13193 u32 nic_phy_id, ver, cfg2 = 0, cfg4 = 0, eeprom_phy_id; in tg3_get_eeprom_hw_cfg() local
13205 tg3_read_mem(tp, NIC_SRAM_DATA_CFG_2, &cfg2); in tg3_get_eeprom_hw_cfg()
13234 led_cfg = cfg2 & (NIC_SRAM_DATA_CFG_LED_MODE_MASK | in tg3_get_eeprom_hw_cfg()
13324 if (cfg2 & (1 << 17)) in tg3_get_eeprom_hw_cfg()
13329 if (cfg2 & (1 << 18)) in tg3_get_eeprom_hw_cfg()
13335 (cfg2 & NIC_SRAM_DATA_CFG_2_APD_EN)) in tg3_get_eeprom_hw_cfg()
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| /drivers/scsi/ |
| D | dc395x.c | 198 u8 cfg2; /* Target configuration byte 2 */ member
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