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Searched refs:debugf2 (Results 1 – 10 of 10) sorted by relevance

/drivers/edac/
Di7300_edac.c630 debugf2("\tMTR%d CH%d: DIMMs are %s (mtr)\n", in decode_mtr()
655 debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); in decode_mtr()
657 debugf2("\t\tELECTRICAL THROTTLING is %s\n", in decode_mtr()
660 debugf2("\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr)); in decode_mtr()
661 debugf2("\t\tNUMRANK: %s\n", MTR_DIMM_RANKS(mtr) ? "double" : "single"); in decode_mtr()
662 debugf2("\t\tNUMROW: %s\n", numrow_toString[MTR_DIMM_ROWS(mtr)]); in decode_mtr()
663 debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]); in decode_mtr()
664 debugf2("\t\tSIZE: %d MB\n", dinfo->megabytes); in decode_mtr()
682 debugf2("\t\tECC code is 8-byte-over-32-byte SECDED+ code\n"); in decode_mtr()
684 debugf2("\t\tECC code is on Lockstep mode\n"); in decode_mtr()
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Di5400_edac.c900 debugf2("\tMTR%d=0x%x: DIMMs are %s\n", slot_row, mtr, in decode_mtr()
905 debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); in decode_mtr()
907 debugf2("\t\tELECTRICAL THROTTLING is %s\n", in decode_mtr()
910 debugf2("\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr)); in decode_mtr()
911 debugf2("\t\tNUMRANK: %s\n", MTR_DIMM_RANK(mtr) ? "double" : "single"); in decode_mtr()
912 debugf2("\t\tNUMROW: %s\n", numrow_toString[MTR_DIMM_ROWS(mtr)]); in decode_mtr()
913 debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]); in decode_mtr()
986 debugf2("%s\n", mem_buffer); in calculate_dimm_size()
1001 debugf2("%s\n", mem_buffer); in calculate_dimm_size()
1011 debugf2("%s\n", mem_buffer); in calculate_dimm_size()
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Di5000_edac.c979 debugf2("\tMTR%d=0x%x: DIMMs are %s\n", slot_row, mtr, in decode_mtr()
984 debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); in decode_mtr()
985 debugf2("\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr)); in decode_mtr()
986 debugf2("\t\tNUMRANK: %s\n", MTR_DIMM_RANK(mtr) ? "double" : "single"); in decode_mtr()
987 debugf2("\t\tNUMROW: %s\n", numrow_toString[MTR_DIMM_ROWS(mtr)]); in decode_mtr()
988 debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]); in decode_mtr()
1068 debugf2("%s\n", mem_buffer); in calculate_dimm_size()
1108 debugf2("%s\n", mem_buffer); in calculate_dimm_size()
1138 debugf2("AMBASE= 0x%lx MAXCH= %d MAX-DIMM-Per-CH= %d\n", in i5000_get_mc_regs()
1144 debugf2("\nTOLM (number of 256M regions) =%u (0x%x)\n", pvt->tolm, in i5000_get_mc_regs()
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Dr82600_edac.c278 debugf2("%s(): sdram refresh rate = %#0x\n", __func__, in r82600_probe1()
280 debugf2("%s(): DRAMC register = %#0x\n", __func__, dramcr); in r82600_probe1()
Dedac_core.h83 #define debugf2( ... ) edac_debug_printk(2, __VA_ARGS__ ) macro
91 #define debugf2( ... ) macro
Damd64_edac.c321 debugf2("sys_addr 0x%lx doesn't match any node\n", in find_mc_by_sys_addr()
393 debugf2("InputAddr 0x%lx matches csrow %d (node %d)\n", in input_addr_to_csrow()
400 debugf2("no matching csrow for InputAddr 0x%lx (MC node %d)\n", in input_addr_to_csrow()
528 debugf2("using DHAR to translate SysAddr 0x%lx to " in sys_addr_to_dram_addr()
548 debugf2("using DRAM Base register to translate SysAddr 0x%lx to " in sys_addr_to_dram_addr()
586 debugf2(" Intlv Shift=%d DramAddr=0x%lx maps to InputAddr=0x%lx\n", in dram_addr_to_input_addr()
604 debugf2("SysAdddr 0x%lx translates to InputAddr 0x%lx\n", in sys_addr_to_input_addr()
Dedac_pci_sysfs.c180 debugf2("%s() failed to register instance pci%d\n", in edac_pci_create_instance_kobj()
Dedac_device_sysfs.c650 debugf2("%s() Failed to register instance '%s'\n", in edac_device_create_instance()
Dsb_edac.c1860 debugf2("MC: " __FILE__ ": %s()\n", __func__); in sbridge_init()
1884 debugf2("MC: " __FILE__ ": %s()\n", __func__); in sbridge_exit()
Di7core_edac.c2464 debugf2("MC: " __FILE__ ": %s()\n", __func__); in i7core_init()
2491 debugf2("MC: " __FILE__ ": %s()\n", __func__); in i7core_exit()