Searched refs:dw_readl (Results 1 – 4 of 4) sorted by relevance
/drivers/i2c/busses/ |
D | i2c-designware-core.c | 166 u32 dw_readl(struct dw_i2c_dev *dev, int offset) in dw_readl() function 256 reg = dw_readl(dev, DW_IC_COMP_TYPE); in i2c_dw_init() 318 while (dw_readl(dev, DW_IC_STATUS) & DW_IC_STATUS_ACTIVITY) { in i2c_dw_wait_bus_not_busy() 342 ic_con = dw_readl(dev, DW_IC_CON); in i2c_dw_xfer_init() 401 tx_limit = dev->tx_fifo_depth - dw_readl(dev, DW_IC_TXFLR); in i2c_dw_xfer_msg() 402 rx_limit = dev->rx_fifo_depth - dw_readl(dev, DW_IC_RXFLR); in i2c_dw_xfer_msg() 458 rx_valid = dw_readl(dev, DW_IC_RXFLR); in i2c_dw_read() 461 *buf++ = dw_readl(dev, DW_IC_DATA_CMD); in i2c_dw_read() 588 stat = dw_readl(dev, DW_IC_INTR_STAT); in i2c_dw_read_clear_intrbits() 598 dw_readl(dev, DW_IC_CLR_RX_UNDER); in i2c_dw_read_clear_intrbits() [all …]
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D | i2c-designware-core.h | 93 extern u32 dw_readl(struct dw_i2c_dev *dev, int offset);
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/drivers/spi/ |
D | spi-dw.c | 86 "CTRL0: \t\t0x%08x\n", dw_readl(dws, DW_SPI_CTRL0)); in spi_show_regs() 88 "CTRL1: \t\t0x%08x\n", dw_readl(dws, DW_SPI_CTRL1)); in spi_show_regs() 90 "SSIENR: \t0x%08x\n", dw_readl(dws, DW_SPI_SSIENR)); in spi_show_regs() 92 "SER: \t\t0x%08x\n", dw_readl(dws, DW_SPI_SER)); in spi_show_regs() 94 "BAUDR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_BAUDR)); in spi_show_regs() 96 "TXFTLR: \t0x%08x\n", dw_readl(dws, DW_SPI_TXFLTR)); in spi_show_regs() 98 "RXFTLR: \t0x%08x\n", dw_readl(dws, DW_SPI_RXFLTR)); in spi_show_regs() 100 "TXFLR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_TXFLR)); in spi_show_regs() 102 "RXFLR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_RXFLR)); in spi_show_regs() 104 "SR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_SR)); in spi_show_regs() [all …]
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D | spi-dw.h | 162 static inline u32 dw_readl(struct dw_spi *dws, u32 offset) in dw_readl() function 208 new_mask = dw_readl(dws, DW_SPI_IMR) & ~mask; in spi_mask_intr() 217 new_mask = dw_readl(dws, DW_SPI_IMR) | mask; in spi_umask_intr()
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