| /drivers/dma/ |
| D | coh901318_lli.c | 59 struct coh901318_lli *lli; in coh901318_lli_alloc() local
75 lli = head; in coh901318_lli_alloc()
76 lli->phy_this = phy; in coh901318_lli_alloc()
77 lli->link_addr = 0x00000000; in coh901318_lli_alloc()
78 lli->virt_link_addr = 0x00000000U; in coh901318_lli_alloc()
81 lli_prev = lli; in coh901318_lli_alloc()
83 lli = dma_pool_alloc(pool->dmapool, GFP_NOWAIT, &phy); in coh901318_lli_alloc()
85 if (lli == NULL) in coh901318_lli_alloc()
89 lli->phy_this = phy; in coh901318_lli_alloc()
90 lli->link_addr = 0x00000000; in coh901318_lli_alloc()
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| D | ste_dma40_ll.c | 125 static int d40_phy_fill_lli(struct d40_phy_lli *lli, in d40_phy_fill_lli() argument
153 lli->reg_elt = (data_size >> data_width) << D40_SREG_ELEM_PHY_ECNT_POS; in d40_phy_fill_lli()
160 lli->reg_elt |= (0x1 << data_width) << in d40_phy_fill_lli()
164 lli->reg_ptr = data; in d40_phy_fill_lli()
165 lli->reg_cfg = reg_cfg; in d40_phy_fill_lli()
169 lli->reg_lnk = 0x1 << D40_SREG_LNK_PHY_TCP_POS; in d40_phy_fill_lli()
171 lli->reg_lnk = next_lli; in d40_phy_fill_lli()
175 lli->reg_cfg |= 0x1 << D40_SREG_CFG_TIM_POS; in d40_phy_fill_lli()
177 lli->reg_cfg &= ~(0x1 << D40_SREG_CFG_TIM_POS); in d40_phy_fill_lli()
180 lli->reg_lnk |= 0 << D40_SREG_LNK_PHY_PRE_POS; in d40_phy_fill_lli()
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| D | coh901318.c | 42 struct coh901318_lli *lli; member
85 struct coh901318_lli *lli) in coh901318_list_print() argument
87 struct coh901318_lli *l = lli; in coh901318_list_print()
289 struct coh901318_lli *lli) in coh901318_prep_linked_list() argument
298 writel(lli->src_addr, in coh901318_prep_linked_list()
302 writel(lli->dst_addr, virtbase + in coh901318_prep_linked_list()
306 writel(lli->link_addr, virtbase + COH901318_CX_LNK_ADDR + in coh901318_prep_linked_list()
309 writel(lli->control, virtbase + COH901318_CX_CTRL + in coh901318_prep_linked_list()
402 struct coh901318_lli *lli = in_lli; in coh901318_get_bytes_in_lli() local
405 while (lli) { in coh901318_get_bytes_in_lli()
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| D | dw_dmac.c | 128 child->txd.phys, sizeof(child->lli), in dwc_sync_desc_for_cpu()
131 desc->txd.phys, sizeof(desc->lli), in dwc_sync_desc_for_cpu()
258 dma_unmap_single(parent, desc->lli.dar, in dwc_descriptor_complete()
261 dma_unmap_page(parent, desc->lli.dar, in dwc_descriptor_complete()
266 dma_unmap_single(parent, desc->lli.sar, in dwc_descriptor_complete()
269 dma_unmap_page(parent, desc->lli.sar, in dwc_descriptor_complete()
349 if (desc->lli.llp == llp) { in dwc_scan_descriptors()
356 if (child->lli.llp == llp) { in dwc_scan_descriptors()
386 static void dwc_dump_lli(struct dw_dma_chan *dwc, struct dw_lli *lli) in dwc_dump_lli() argument
390 lli->sar, lli->dar, lli->llp, in dwc_dump_lli()
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| D | at_hdmac_regs.h | 169 struct at_lli lli; member
351 static void atc_dump_lli(struct at_dma_chan *atchan, struct at_lli *lli) in atc_dump_lli() argument
355 lli->saddr, lli->daddr, in atc_dump_lli()
356 lli->ctrla, lli->ctrlb, lli->dscr); in atc_dump_lli()
419 u32 ctrlb = desc->lli.ctrlb; in set_desc_eol()
424 desc->lli.ctrlb = ctrlb; in set_desc_eol()
425 desc->lli.dscr = 0; in set_desc_eol()
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| D | at_hdmac.c | 187 (*prev)->lli.dscr = desc->txd.phys; in atc_desc_chain()
263 desc->lli.daddr, in atc_chain_complete()
267 desc->lli.daddr, in atc_chain_complete()
273 desc->lli.saddr, in atc_chain_complete()
277 desc->lli.saddr, in atc_chain_complete()
346 if (!(desc->lli.ctrla & ATC_DONE)) in atc_cleanup_descriptors()
351 if (!(child->lli.ctrla & ATC_DONE)) in atc_cleanup_descriptors()
422 atc_dump_lli(atchan, &bad_desc->lli); in atc_handle_error()
424 atc_dump_lli(atchan, &child->lli); in atc_handle_error()
606 desc->lli.saddr = src + offset; in atc_prep_dma_memcpy()
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| D | coh901318_lli.h | 64 struct coh901318_lli **lli);
79 struct coh901318_lli *lli,
97 struct coh901318_lli *lli,
118 struct coh901318_lli *lli,
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| D | intel_mid_dma.c | 297 if (desc->lli != NULL) { in midc_descriptor_complete()
299 llitem = desc->lli + desc->current_lli; in midc_descriptor_complete()
313 if (desc->lli != NULL) { in midc_descriptor_complete()
314 pci_pool_free(desc->lli_pool, desc->lli, in midc_descriptor_complete()
317 desc->lli = NULL; in midc_descriptor_complete()
375 lli_bloc_desc = desc->lli; in midc_lli_fill_sg()
417 desc->ctl_lo = desc->lli->ctl_lo; in midc_lli_fill_sg()
418 desc->ctl_hi = desc->lli->ctl_hi; in midc_lli_fill_sg()
419 desc->sar = desc->lli->sar; in midc_lli_fill_sg()
420 desc->dar = desc->lli->dar; in midc_lli_fill_sg()
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| D | amba-pl08x.c | 113 u32 lli; member
193 struct pl08x_lli *lli = &txd->llis_va[0]; in pl08x_start_txd() local
205 phychan->id, lli->src, lli->dst, lli->lli, lli->cctl, in pl08x_start_txd()
208 writel(lli->src, phychan->base + PL080_CH_SRC_ADDR); in pl08x_start_txd()
209 writel(lli->dst, phychan->base + PL080_CH_DST_ADDR); in pl08x_start_txd()
210 writel(lli->lli, phychan->base + PL080_CH_LLI); in pl08x_start_txd()
211 writel(lli->cctl, phychan->base + PL080_CH_CONTROL); in pl08x_start_txd()
347 if (!llis_va[index].lli) in pl08x_getbytes_chan()
540 llis_va[num_llis].lli = llis_bus + (num_llis + 1) * in pl08x_fill_lli_for_desc()
542 llis_va[num_llis].lli |= bd->lli_bus; in pl08x_fill_lli_for_desc()
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| D | ste_dma40_ll.h | 321 struct d40_phy_lli *lli,
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| D | dw_dmac_regs.h | 237 struct dw_lli lli; member
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| D | intel_mid_dma_regs.h | 258 struct intel_mid_dma_lli *lli; member
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| D | ste_dma40.c | 618 struct d40_log_lli_bidir *lli = &desc->lli_log; in d40_log_lli_to_lcxa() local
655 &lli->dst[lli_current], in d40_log_lli_to_lcxa()
656 &lli->src[lli_current], in d40_log_lli_to_lcxa()
683 &lli->dst[lli_current], in d40_log_lli_to_lcxa()
684 &lli->src[lli_current], in d40_log_lli_to_lcxa()
693 &lli->dst[lli_current], in d40_log_lli_to_lcxa()
694 &lli->src[lli_current], in d40_log_lli_to_lcxa()
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| /drivers/isdn/hisax/ |
| D | callc.c | 260 chanp->b_st->lli.l4l3(chanp->b_st, DL_ESTABLISH | REQUEST, NULL); in lli_init_bchan_out()
277 chanp->d_st->lli.l4l3(chanp->d_st, CC_SETUP | REQUEST, chanp); in lli_prep_dialout()
295 chanp->d_st->lli.l4l3(chanp->d_st, CC_RESUME | REQUEST, chanp); in lli_resume()
362 chanp->d_st->lli.l4l3(chanp->d_st, CC_ALERTING | REQUEST, chanp->proc); in lli_deliver_call()
368 chanp->d_st->lli.l4l3(chanp->d_st, CC_PROCEED_SEND | REQUEST, chanp->proc); in lli_deliver_call()
371 chanp->d_st->lli.l4l3(chanp->d_st, CC_REDIR | REQUEST, chanp->proc); in lli_deliver_call()
378 chanp->d_st->lli.l4l3(chanp->d_st, CC_MORE_INFO | REQUEST, chanp->proc); in lli_deliver_call()
382 chanp->d_st->lli.l4l3(chanp->d_st, CC_IGNORE | REQUEST, chanp->proc); in lli_deliver_call()
388 chanp->d_st->lli.l4l3(chanp->d_st, CC_IGNORE | REQUEST, chanp->proc); in lli_deliver_call()
399 chanp->d_st->lli.l4l3(chanp->d_st, CC_SETUP | RESPONSE, chanp->proc); in lli_send_dconnect()
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| D | isdnl3.c | 165 t->pc->st->lli.l4l3(t->pc->st, t->event, t->pc); in L3ExpireTimer()
345 st->lli.l4l3_proto = no_l3_proto_spec; in setstack_l3dc()
363 st->lli.l4l3 = no_l3_proto; in setstack_l3dc()
368 st->lli.l4l3 = no_l3_proto; in setstack_l3dc()
414 st->lli.l4l3 = isdnl3_trans; in setstack_l3bc()
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| D | jade_irq.c | 178 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) && in jade_interrupt()
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| D | hscx_irq.c | 200 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) && in hscx_interrupt()
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| D | l3ni1.c | 2562 up->st->lli.l4l3(up->st, CC_RESTART | REQUEST, up); in l3ni1_global_restart()
2564 up->st->lli.l4l3(up->st, CC_RESTART | REQUEST, up); in l3ni1_global_restart()
2626 struct Channel *pChan = pc->st->lli.userdata; in l3ni1_SendSpid()
3152 st->lli.l4l3 = ni1down; in setstack_ni1()
3153 st->lli.l4l3_proto = l3ni1_cmd_global; in setstack_ni1()
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| D | l3dss1.c | 2706 up->st->lli.l4l3(up->st, CC_RESTART | REQUEST, up); in l3dss1_global_restart()
2708 up->st->lli.l4l3(up->st, CC_RESTART | REQUEST, up); in l3dss1_global_restart()
3200 st->lli.l4l3 = dss1down; in setstack_dss1()
3201 st->lli.l4l3_proto = l3dss1_cmd_global; in setstack_dss1()
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| D | elsa_ser.c | 287 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) && in modem_fill()
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| D | hfc_2bs0.c | 312 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) && in hfc_fill_fifo()
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| D | hisax.h | 324 struct LLInterface lli; member
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| /drivers/ata/ |
| D | sata_dwc_460ex.c | 113 struct lli { struct
122 SATA_DWC_DMAC_LLI_SZ = (sizeof(struct lli)), argument
283 struct lli *llit[SATA_DWC_QCMD_MAX]; /* DMA LLI table */
335 struct lli *lli, dma_addr_t dma_lli,
571 struct lli *lli, dma_addr_t dma_lli, in map_sg_to_lli() argument
580 " dmadr=0x%08x\n", __func__, sg, num_elems, lli, (u32)dma_lli, in map_sg_to_lli()
633 lli[idx].dar = cpu_to_le32(addr); in map_sg_to_lli()
634 lli[idx].sar = cpu_to_le32((u32)dmadr_addr); in map_sg_to_lli()
636 lli[idx].ctl.low = cpu_to_le32( in map_sg_to_lli()
649 lli[idx].sar = cpu_to_le32(addr); in map_sg_to_lli()
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| /drivers/net/ethernet/chelsio/cxgb4/ |
| D | cxgb4_main.c | 2452 struct cxgb4_lld_info lli; in uld_attach() local
2454 lli.pdev = adap->pdev; in uld_attach()
2455 lli.l2t = adap->l2t; in uld_attach()
2456 lli.tids = &adap->tids; in uld_attach()
2457 lli.ports = adap->port; in uld_attach()
2458 lli.vr = &adap->vres; in uld_attach()
2459 lli.mtus = adap->params.mtus; in uld_attach()
2461 lli.rxq_ids = adap->sge.rdma_rxq; in uld_attach()
2462 lli.nrxq = adap->sge.rdmaqs; in uld_attach()
2464 lli.rxq_ids = adap->sge.ofld_rxq; in uld_attach()
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| /drivers/isdn/hardware/eicon/ |
| D | message.c | 1209 static byte lli[2] = {0x01, 0x00}; in connect_req() local
1315 add_p(plci, LLI, lli); in connect_req()
3448 static byte lli[2] = {0x01, 0x00}; in manufacturer_req() local
3486 lli[1] = 0; in manufacturer_req()
3504 lli[1] = 0x10; /* local call codec stream */ in manufacturer_req()
3517 add_p(plci, LLI, lli); in manufacturer_req()
7949 static byte lli[12] = {1,1}; in add_b23() local
7961 lli[0] = 1; in add_b23()
7962 lli[1] = 1; in add_b23()
7964 lli[1] |= 2; in add_b23()
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