Home
last modified time | relevance | path

Searched refs:lvds (Results 1 – 15 of 15) sorted by relevance

/drivers/gpu/drm/radeon/
Dradeon_combios.c1104 struct radeon_encoder_lvds *lvds = NULL; in radeon_legacy_get_lvds_info_from_regs() local
1109 lvds = kzalloc(sizeof(struct radeon_encoder_lvds), GFP_KERNEL); in radeon_legacy_get_lvds_info_from_regs()
1111 if (!lvds) in radeon_legacy_get_lvds_info_from_regs()
1118 lvds->panel_pwr_delay = 200; in radeon_legacy_get_lvds_info_from_regs()
1119 lvds->panel_vcc_delay = 2000; in radeon_legacy_get_lvds_info_from_regs()
1121 lvds->lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); in radeon_legacy_get_lvds_info_from_regs()
1122 lvds->panel_digon_delay = (lvds_ss_gen_cntl >> RADEON_LVDS_PWRSEQ_DELAY1_SHIFT) & 0xf; in radeon_legacy_get_lvds_info_from_regs()
1123 lvds->panel_blon_delay = (lvds_ss_gen_cntl >> RADEON_LVDS_PWRSEQ_DELAY2_SHIFT) & 0xf; in radeon_legacy_get_lvds_info_from_regs()
1126 lvds->native_mode.vdisplay = in radeon_legacy_get_lvds_info_from_regs()
1130 lvds->native_mode.vdisplay = in radeon_legacy_get_lvds_info_from_regs()
[all …]
Dradeon_legacy_encoders.c62 struct radeon_encoder_atom_dig *lvds = radeon_encoder->enc_priv; in radeon_legacy_lvds_update() local
63 panel_pwr_delay = lvds->panel_pwr_delay; in radeon_legacy_lvds_update()
64 if (lvds->bl_dev) in radeon_legacy_lvds_update()
65 backlight_level = lvds->backlight_level; in radeon_legacy_lvds_update()
67 struct radeon_encoder_lvds *lvds = radeon_encoder->enc_priv; in radeon_legacy_lvds_update() local
68 panel_pwr_delay = lvds->panel_pwr_delay; in radeon_legacy_lvds_update()
69 if (lvds->bl_dev) in radeon_legacy_lvds_update()
70 backlight_level = lvds->backlight_level; in radeon_legacy_lvds_update()
143 struct radeon_encoder_atom_dig *lvds = radeon_encoder->enc_priv; in radeon_legacy_lvds_dpms() local
144 lvds->dpms_mode = mode; in radeon_legacy_lvds_dpms()
[all …]
Dradeon_atombios.c1521 struct radeon_encoder_atom_dig *lvds = NULL; in radeon_atombios_get_lvds_info() local
1528 lvds = in radeon_atombios_get_lvds_info()
1531 if (!lvds) in radeon_atombios_get_lvds_info()
1534 lvds->native_mode.clock = in radeon_atombios_get_lvds_info()
1536 lvds->native_mode.hdisplay = in radeon_atombios_get_lvds_info()
1538 lvds->native_mode.vdisplay = in radeon_atombios_get_lvds_info()
1540 lvds->native_mode.htotal = lvds->native_mode.hdisplay + in radeon_atombios_get_lvds_info()
1542 lvds->native_mode.hsync_start = lvds->native_mode.hdisplay + in radeon_atombios_get_lvds_info()
1544 lvds->native_mode.hsync_end = lvds->native_mode.hsync_start + in radeon_atombios_get_lvds_info()
1546 lvds->native_mode.vtotal = lvds->native_mode.vdisplay + in radeon_atombios_get_lvds_info()
[all …]
Dradeon_legacy_crtc.c765 struct radeon_encoder_lvds *lvds = (struct radeon_encoder_lvds *)radeon_encoder->enc_priv; in radeon_set_pll() local
766 if (lvds) { in radeon_set_pll()
767 if (lvds->use_bios_dividers) { in radeon_set_pll()
768 pll_ref_div = lvds->panel_ref_divider; in radeon_set_pll()
769 pll_fb_post_div = (lvds->panel_fb_divider | in radeon_set_pll()
770 (lvds->panel_post_divider << 16)); in radeon_set_pll()
/drivers/staging/xgifb/
Dvb_init.c1125 struct XGI21_LVDSCapStruct *lvds; in xgifb_read_vbios() local
1166 lvds = &xgifb_info->lvds_data; in xgifb_read_vbios()
1169 lvds->LVDS_Capability = vbios[i] | (vbios[i + 1] << 8); in xgifb_read_vbios()
1170 lvds->LVDSHT = vbios[i + 2] | (vbios[i + 3] << 8); in xgifb_read_vbios()
1171 lvds->LVDSVT = vbios[i + 4] | (vbios[i + 5] << 8); in xgifb_read_vbios()
1172 lvds->LVDSHDE = vbios[i + 6] | (vbios[i + 7] << 8); in xgifb_read_vbios()
1173 lvds->LVDSVDE = vbios[i + 8] | (vbios[i + 9] << 8); in xgifb_read_vbios()
1174 lvds->LVDSHFP = vbios[i + 10] | (vbios[i + 11] << 8); in xgifb_read_vbios()
1175 lvds->LVDSVFP = vbios[i + 12] | (vbios[i + 13] << 8); in xgifb_read_vbios()
1176 lvds->LVDSHSYNC = vbios[i + 14] | (vbios[i + 15] << 8); in xgifb_read_vbios()
[all …]
/drivers/gpu/drm/gma500/
Dcdv_intel_lvds.c577 u32 lvds; in cdv_intel_lvds_init() local
692 lvds = REG_READ(LVDS); in cdv_intel_lvds_init()
693 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; in cdv_intel_lvds_init()
696 if (crtc && (lvds & LVDS_PORT_EN)) { in cdv_intel_lvds_init()
Dpsb_intel_lvds.c711 u32 lvds; in psb_intel_lvds_init() local
825 lvds = REG_READ(LVDS); in psb_intel_lvds_init()
826 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; in psb_intel_lvds_init()
829 if (crtc && (lvds & LVDS_PORT_EN)) { in psb_intel_lvds_init()
Dpsb_intel_display.c726 u32 lvds = REG_READ(LVDS); in psb_intel_crtc_mode_set() local
728 lvds &= ~LVDS_PIPEB_SELECT; in psb_intel_crtc_mode_set()
730 lvds |= LVDS_PIPEB_SELECT; in psb_intel_crtc_mode_set()
732 lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP; in psb_intel_crtc_mode_set()
737 lvds &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP); in psb_intel_crtc_mode_set()
739 lvds |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP; in psb_intel_crtc_mode_set()
746 REG_WRITE(LVDS, lvds); in psb_intel_crtc_mode_set()
DMakefile48 tc35876x-dsi-lvds.o
Dcdv_intel_display.c819 u32 lvds = REG_READ(LVDS); in cdv_intel_crtc_mode_set() local
821 lvds |= in cdv_intel_crtc_mode_set()
829 lvds |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP; in cdv_intel_crtc_mode_set()
831 lvds &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP); in cdv_intel_crtc_mode_set()
838 REG_WRITE(LVDS, lvds); in cdv_intel_crtc_mode_set()
/drivers/gpu/drm/i915/
Dintel_lvds.c932 u32 lvds; in intel_lvds_init() local
1076 lvds = I915_READ(LVDS); in intel_lvds_init()
1077 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; in intel_lvds_init()
1080 if (crtc && (lvds & LVDS_PORT_EN)) { in intel_lvds_init()
Di915_drv.h370 unsigned int sr01, adpa, ppcr, dvob, dvoc, lvds; member
/drivers/video/intelfb/
Dintelfb.h206 u32 lvds; member
Dintelfbhw.c580 hw->lvds = INREG(LVDS); in intelfbhw_read_hw_state()
665 int lvds) in calc_vclock() argument
808 printk(" LVDS: 0x%08x\n", hw->lvds); in intelfbhw_print_hw_state()
/drivers/gpu/drm/nouveau/
Dnouveau_bios.c5402 parse_bit_table(bios, bitoffset, &BIT_TABLE('L', lvds)); in parse_bit_structure()