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Searched refs:pool_bm (Results 1 – 3 of 3) sorted by relevance

/drivers/net/ethernet/mellanox/mlx4/
Deq.c792 if (priv->msix_ctl.pool_bm & 1ULL << i) { in mlx4_free_irqs()
1071 if (~priv->msix_ctl.pool_bm & 1ULL << i) { in mlx4_assign_eq()
1072 priv->msix_ctl.pool_bm |= 1ULL << i; in mlx4_assign_eq()
1083 priv->msix_ctl.pool_bm ^= 1 << i; in mlx4_assign_eq()
1113 if (priv->msix_ctl.pool_bm & 1ULL << i) { in mlx4_release_eq()
1116 priv->msix_ctl.pool_bm &= ~(1ULL << i); in mlx4_release_eq()
Dmlx4.h705 u64 pool_bm; member
Dmain.c1932 priv->msix_ctl.pool_bm = 0; in __mlx4_init_one()