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Searched refs:rts51x_add_cmd (Results 1 – 9 of 9) sorted by relevance

/drivers/staging/rts5139/
Dxd.c97 rts51x_add_cmd(chip, WRITE_REG_CMD, XD_DAT, 0xFF, id_cmd); in xd_read_id()
98 rts51x_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, in xd_read_id()
100 rts51x_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, XD_TRANSFER_END, in xd_read_id()
104 rts51x_add_cmd(chip, READ_REG_CMD, (u16) (XD_ADDRESS1 + i), 0, in xd_read_id()
134 rts51x_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS0, 0xFF, 0); in xd_assign_phy_addr()
135 rts51x_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS1, 0xFF, in xd_assign_phy_addr()
137 rts51x_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS2, 0xFF, in xd_assign_phy_addr()
139 rts51x_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS3, 0xFF, in xd_assign_phy_addr()
141 rts51x_add_cmd(chip, WRITE_REG_CMD, XD_CFG, 0xFF, in xd_assign_phy_addr()
147 rts51x_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS0, 0xFF, in xd_assign_phy_addr()
[all …]
Dsd.c123 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CMD0, 0xFF, 0x40 | cmd_idx);
124 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CMD1, 0xFF, (u8) (arg >> 24));
125 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CMD2, 0xFF, (u8) (arg >> 16));
126 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CMD3, 0xFF, (u8) (arg >> 8));
127 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CMD4, 0xFF, (u8) arg);
129 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type);
130 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01,
132 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
134 rts51x_add_cmd(chip, CHECK_REG_CMD, SD_TRANSFER,
138 rts51x_add_cmd(chip, READ_REG_CMD, SD_STAT1, 0, 0);
[all …]
Dsd_cprm.c105 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CMD0, 0xFF, 0x40 | cmd_idx);
106 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CMD1, 0xFF, (u8) (arg >> 24));
107 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CMD2, 0xFF, (u8) (arg >> 16));
108 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CMD3, 0xFF, (u8) (arg >> 8));
109 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CMD4, 0xFF, (u8) arg);
111 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type);
112 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
114 rts51x_add_cmd(chip, WRITE_REG_CMD, SD_TRANSFER,
116 rts51x_add_cmd(chip, CHECK_REG_CMD, SD_TRANSFER, SD_TRANSFER_END,
119 rts51x_add_cmd(chip, READ_REG_CMD, SD_STAT1, 0, 0);
[all …]
Drts51x_card.c116 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_OE, XD_OUTPUT_EN, 0); in do_reset_xd_card()
117 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, POWER_MASK, in do_reset_xd_card()
119 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_CLK_EN, XD_CLK_EN, 0); in do_reset_xd_card()
143 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0); in do_reset_sd_card()
144 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, POWER_MASK, in do_reset_sd_card()
146 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0); in do_reset_sd_card()
170 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_OE, MS_OUTPUT_EN, 0); in do_reset_ms_card()
171 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, POWER_MASK, in do_reset_ms_card()
173 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_CLK_EN, MS_CLK_EN, 0); in do_reset_ms_card()
496 rts51x_add_cmd(chip, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, CLK_CHANGE); in switch_ssc_clock()
[all …]
Dms.c69 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc); in ms_transfer_tpc()
70 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt); in ms_transfer_tpc()
71 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg); in ms_transfer_tpc()
72 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, in ms_transfer_tpc()
75 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, in ms_transfer_tpc()
77 rts51x_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, in ms_transfer_tpc()
80 rts51x_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0); in ms_transfer_tpc()
147 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc); in ms_transfer_data()
148 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_H, 0xFF, in ms_transfer_data()
150 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, in ms_transfer_data()
[all …]
Drts51x_chip.c123 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_GPIO, GPIO_OE, GPIO_OE); in rts51x_reset_chip()
126 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_AUTO_BLINK, in rts51x_reset_chip()
130 rts51x_add_cmd(chip, WRITE_REG_CMD, CARD_DMA1_CTL, in rts51x_reset_chip()
491 void rts51x_add_cmd(struct rts51x_chip *chip, in rts51x_add_cmd() function
572 rts51x_add_cmd(chip, WRITE_REG_CMD, addr, mask, data); in rts51x_write_register()
587 rts51x_add_cmd(chip, READ_REG_CMD, addr, 0, 0); in rts51x_read_register()
761 rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VSTAIN, 0xFF, val); in rts51x_write_phy_register()
762 rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VCONTROL, 0xFF, addr & 0x0F); in rts51x_write_phy_register()
763 rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00); in rts51x_write_phy_register()
764 rts51x_add_cmd(chip, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00); in rts51x_write_phy_register()
[all …]
Dms_mg.c561 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, in mg_set_ICV()
563 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, in mg_set_ICV()
568 rts51x_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, in mg_set_ICV()
570 rts51x_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, in mg_set_ICV()
Drts51x_chip.h844 void rts51x_add_cmd(struct rts51x_chip *chip,
Drts51x_scsi.c1316 rts51x_add_cmd(chip, cmd_type, addr, mask, value); in rw_mem_cmd_buf()