Searched refs:sd_ctl (Results 1 – 8 of 8) sorted by relevance
233 struct sd_ctl { struct241 struct sd_ctl ctl; argument
572 if ((chip->sd_ctl & SD_PUSH_POINT_CTL_MASK) == SD_PUSH_POINT_AUTO) { in sd_set_sample_push_timing()574 } else if ((chip->sd_ctl & SD_PUSH_POINT_CTL_MASK) == SD_PUSH_POINT_DELAY) { in sd_set_sample_push_timing()581 if ((chip->sd_ctl & SD_SAMPLE_POINT_CTL_MASK) == SD_SAMPLE_POINT_AUTO) { in sd_set_sample_push_timing()591 } else if ((chip->sd_ctl & SD_SAMPLE_POINT_CTL_MASK) == SD_SAMPLE_POINT_DELAY) { in sd_set_sample_push_timing()601 if ((chip->sd_ctl & SD_PUSH_POINT_CTL_MASK) == SD_PUSH_POINT_DELAY) { in sd_set_sample_push_timing()605 if ((chip->sd_ctl & SD_SAMPLE_POINT_CTL_MASK) == SD_SAMPLE_POINT_AUTO) { in sd_set_sample_push_timing()621 } else if ((chip->sd_ctl & SD_SAMPLE_POINT_CTL_MASK) == SD_SAMPLE_POINT_DELAY) { in sd_set_sample_push_timing()1913 if (!(chip->sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) { in sd_ddr_tuning()1930 if (!(chip->sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) { in sd_ddr_tuning()1944 if (!(chip->sd_ctl & MMC_DDR_TX_PHASE_SET_BY_USER)) { in mmc_ddr_tuning()[all …]
910 u32 sd_ctl; member
843 chip->sd_ctl = SD_PUSH_POINT_AUTO | in rtsx_init_options()
587 if ((chip->option.sd_ctl & SD_PUSH_POINT_CTL_MASK) ==590 } else if ((chip->option.sd_ctl & SD_PUSH_POINT_CTL_MASK) ==599 if ((chip->option.sd_ctl & SD_SAMPLE_POINT_CTL_MASK) ==609 } else if ((chip->option.sd_ctl & SD_SAMPLE_POINT_CTL_MASK) ==1740 if (!(chip->option.sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) {1756 if (!(chip->option.sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) {1769 if (!(chip->option.sd_ctl & MMC_DDR_TX_PHASE_SET_BY_USER)) {1785 if (!(chip->option.sd_ctl & MMC_DDR_TX_PHASE_SET_BY_USER)) {
98 if (chip->option.sd_ctl & SUPPORT_UHS50_MMC44) { in rts51x_reset_chip()101 chip->option.sd_ctl); in rts51x_reset_chip()
365 u32 sd_ctl; member
547 option->sd_ctl = in rts51x_init_options()