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Searched refs:viafb_read_reg (Results 1 – 6 of 6) sorted by relevance

/drivers/video/via/
Ddvi.c58 sr2a = viafb_read_reg(VIASR, SR2A); in viafb_tmds_trasmitter_identify()
65 sr2a = viafb_read_reg(VIASR, SR2A); in viafb_tmds_trasmitter_identify()
68 sr1e = viafb_read_reg(VIASR, SR1E); in viafb_tmds_trasmitter_identify()
74 sr1e = viafb_read_reg(VIASR, SR1E); in viafb_tmds_trasmitter_identify()
79 sr3e = viafb_read_reg(VIASR, SR3E); in viafb_tmds_trasmitter_identify()
203 RegSR1E = viafb_read_reg(VIASR, SR1E); in viafb_dvi_sense()
207 RegCR6B = viafb_read_reg(VIACR, CR6B); in viafb_dvi_sense()
212 RegCR91 = viafb_read_reg(VIACR, CR91); in viafb_dvi_sense()
219 RegCR93 = viafb_read_reg(VIACR, CR93); in viafb_dvi_sense()
223 RegSR1E = viafb_read_reg(VIASR, SR1E); in viafb_dvi_sense()
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Dvia_utility.c165 sr1a = (unsigned int)viafb_read_reg(VIASR, SR1A); in viafb_set_gamma_table()
220 sr1a = viafb_read_reg(VIASR, SR1A); in viafb_get_gamma_table()
Dviafbdev.c1127 (viafb_read_reg(VIASR, SR2A) & BIT5) >> 4 | in viafb_dvp0_proc_show()
1128 (viafb_read_reg(VIASR, SR1B) & BIT1) >> 1; in viafb_dvp0_proc_show()
1130 (viafb_read_reg(VIASR, SR2A) & BIT4) >> 3 | in viafb_dvp0_proc_show()
1131 (viafb_read_reg(VIASR, SR1E) & BIT2) >> 2; in viafb_dvp0_proc_show()
1132 dvp0 = viafb_read_reg(VIACR, CR96) & 0x0f; in viafb_dvp0_proc_show()
1201 dvp1 = viafb_read_reg(VIACR, CR9B) & 0x0f; in viafb_dvp1_proc_show()
1202 dvp1_data_dri = (viafb_read_reg(VIASR, SR65) & 0x0c) >> 2; in viafb_dvp1_proc_show()
1203 dvp1_clk_dri = viafb_read_reg(VIASR, SR65) & 0x03; in viafb_dvp1_proc_show()
1266 dfp_high = viafb_read_reg(VIACR, CR97) & 0x0f; in viafb_dfph_proc_show()
1306 dfp_low = viafb_read_reg(VIACR, CR99) & 0x0f; in viafb_dfpl_proc_show()
Dlcd.c189 viafb_read_reg(VIACR, CR3F) & 0x0F; in fp_id_to_vindex()
463 cr67 = viafb_read_reg(VIACR, CR67) & 0xFC; in via_pitch_alignment_patch_lcd()
471 cr67 = viafb_read_reg(VIACR, CR67) & 0xF3; in via_pitch_alignment_patch_lcd()
481 cr35 = viafb_read_reg(VIACR, CR35) & 0x1F; in via_pitch_alignment_patch_lcd()
Dhw.c1552 tmp = viafb_read_reg(VIACR, CR4F); in init_gfx_chip_info()
1554 if (viafb_read_reg(VIACR, CR4F) != 0x55) in init_gfx_chip_info()
1565 tmp = viafb_read_reg(VIASR, SR43); in init_gfx_chip_info()
1693 tmp = viafb_read_reg(VIACR, CR6A); in viafb_init_dac()
1906 viafb_read_reg(VIACR, CR02) - 1); in viafb_setmode()
Dhw.h31 #define viafb_read_reg(p, i) via_read_reg(p, i) macro