Searched refs:APIC_BASE_MSR (Results 1 – 4 of 4) sorted by relevance
138 wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); in native_apic_msr_write()148 rdmsrl(APIC_BASE_MSR + (reg >> 4), msr); in native_apic_msr_read()166 wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low); in native_x2apic_icr_write()173 rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val); in native_x2apic_icr_read()
146 #define APIC_BASE_MSR 0x800 macro
1329 u32 reg = (msr - APIC_BASE_MSR) << 4; in kvm_x2apic_msr_write()1343 u32 reg = (msr - APIC_BASE_MSR) << 4, low, high = 0; in kvm_x2apic_msr_read()
1581 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff: in kvm_set_msr_common()1936 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff: in kvm_get_msr_common()