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Searched refs:MUX_CFG (Results 1 – 10 of 10) sorted by relevance

/arch/arm/mach-omap1/
Dmux.c90 MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0)
91 MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0)
94 MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0)
95 MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0)
96 MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0)
97 MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0)
100 MUX_CFG("UART3_TX", 6, 0, 1, 0, 30, 0, NA, 0, 0)
101 MUX_CFG("UART3_RX", 6, 3, 0, 0, 31, 1, NA, 0, 0)
102 MUX_CFG("UART3_CTS", 5, 12, 2, 0, 24, 0, NA, 0, 0)
103 MUX_CFG("UART3_RTS", 5, 15, 2, 0, 25, 0, NA, 0, 0)
[all …]
/arch/arm/mach-davinci/
Dda830.c437 MUX_CFG(DA830, GPIO7_14, 0, 0, 0xf, 1, false)
438 MUX_CFG(DA830, RTCK, 0, 0, 0xf, 8, false)
439 MUX_CFG(DA830, GPIO7_15, 0, 4, 0xf, 1, false)
440 MUX_CFG(DA830, EMU_0, 0, 4, 0xf, 8, false)
441 MUX_CFG(DA830, EMB_SDCKE, 0, 8, 0xf, 1, false)
442 MUX_CFG(DA830, EMB_CLK_GLUE, 0, 12, 0xf, 1, false)
443 MUX_CFG(DA830, EMB_CLK, 0, 12, 0xf, 2, false)
444 MUX_CFG(DA830, NEMB_CS_0, 0, 16, 0xf, 1, false)
445 MUX_CFG(DA830, NEMB_CAS, 0, 20, 0xf, 1, false)
446 MUX_CFG(DA830, NEMB_RAS, 0, 24, 0xf, 1, false)
[all …]
Dtnetv107x.c303 MUX_CFG(TNETV107X, ASR_A00, 0, 0, 0x1f, 0x00, false)
304 MUX_CFG(TNETV107X, GPIO32, 0, 0, 0x1f, 0x04, false)
305 MUX_CFG(TNETV107X, ASR_A01, 0, 5, 0x1f, 0x00, false)
306 MUX_CFG(TNETV107X, GPIO33, 0, 5, 0x1f, 0x04, false)
307 MUX_CFG(TNETV107X, ASR_A02, 0, 10, 0x1f, 0x00, false)
308 MUX_CFG(TNETV107X, GPIO34, 0, 10, 0x1f, 0x04, false)
309 MUX_CFG(TNETV107X, ASR_A03, 0, 15, 0x1f, 0x00, false)
310 MUX_CFG(TNETV107X, GPIO35, 0, 15, 0x1f, 0x04, false)
311 MUX_CFG(TNETV107X, ASR_A04, 0, 20, 0x1f, 0x00, false)
312 MUX_CFG(TNETV107X, GPIO36, 0, 20, 0x1f, 0x04, false)
[all …]
Dda850.c413 MUX_CFG(DA850, NUART0_CTS, 3, 24, 15, 2, false)
414 MUX_CFG(DA850, NUART0_RTS, 3, 28, 15, 2, false)
415 MUX_CFG(DA850, UART0_RXD, 3, 16, 15, 2, false)
416 MUX_CFG(DA850, UART0_TXD, 3, 20, 15, 2, false)
418 MUX_CFG(DA850, UART1_RXD, 4, 24, 15, 2, false)
419 MUX_CFG(DA850, UART1_TXD, 4, 28, 15, 2, false)
421 MUX_CFG(DA850, UART2_RXD, 4, 16, 15, 2, false)
422 MUX_CFG(DA850, UART2_TXD, 4, 20, 15, 2, false)
424 MUX_CFG(DA850, I2C1_SCL, 4, 16, 15, 4, false)
425 MUX_CFG(DA850, I2C1_SDA, 4, 20, 15, 4, false)
[all …]
Ddm365.c491 MUX_CFG(DM365, MMCSD0, 0, 24, 1, 0, false)
493 MUX_CFG(DM365, SD1_CLK, 0, 16, 3, 1, false)
494 MUX_CFG(DM365, SD1_CMD, 4, 30, 3, 1, false)
495 MUX_CFG(DM365, SD1_DATA3, 4, 28, 3, 1, false)
496 MUX_CFG(DM365, SD1_DATA2, 4, 26, 3, 1, false)
497 MUX_CFG(DM365, SD1_DATA1, 4, 24, 3, 1, false)
498 MUX_CFG(DM365, SD1_DATA0, 4, 22, 3, 1, false)
500 MUX_CFG(DM365, I2C_SDA, 3, 23, 3, 2, false)
501 MUX_CFG(DM365, I2C_SCL, 3, 21, 3, 2, false)
503 MUX_CFG(DM365, AEMIF_AR_A14, 2, 0, 3, 1, false)
[all …]
Ddm644x.c382 MUX_CFG(DM644X, HDIREN, 0, 16, 1, 1, true)
383 MUX_CFG(DM644X, ATAEN, 0, 17, 1, 1, true)
384 MUX_CFG(DM644X, ATAEN_DISABLE, 0, 17, 1, 0, true)
386 MUX_CFG(DM644X, HPIEN_DISABLE, 0, 29, 1, 0, true)
388 MUX_CFG(DM644X, AEAW, 0, 0, 31, 31, true)
389 MUX_CFG(DM644X, AEAW0, 0, 0, 1, 0, true)
390 MUX_CFG(DM644X, AEAW1, 0, 1, 1, 0, true)
391 MUX_CFG(DM644X, AEAW2, 0, 2, 1, 0, true)
392 MUX_CFG(DM644X, AEAW3, 0, 3, 1, 0, true)
393 MUX_CFG(DM644X, AEAW4, 0, 4, 1, 0, true)
[all …]
Ddm355.c456 MUX_CFG(DM355, MMCSD0, 4, 2, 1, 0, false)
458 MUX_CFG(DM355, SD1_CLK, 3, 6, 1, 1, false)
459 MUX_CFG(DM355, SD1_CMD, 3, 7, 1, 1, false)
460 MUX_CFG(DM355, SD1_DATA3, 3, 8, 3, 1, false)
461 MUX_CFG(DM355, SD1_DATA2, 3, 10, 3, 1, false)
462 MUX_CFG(DM355, SD1_DATA1, 3, 12, 3, 1, false)
463 MUX_CFG(DM355, SD1_DATA0, 3, 14, 3, 1, false)
465 MUX_CFG(DM355, I2C_SDA, 3, 19, 1, 1, false)
466 MUX_CFG(DM355, I2C_SCL, 3, 20, 1, 1, false)
468 MUX_CFG(DM355, MCBSP0_BDX, 3, 0, 1, 1, false)
[all …]
Ddm646x.c434 MUX_CFG(DM646X, ATAEN, 0, 0, 5, 1, true)
436 MUX_CFG(DM646X, AUDCK1, 0, 29, 1, 0, false)
438 MUX_CFG(DM646X, AUDCK0, 0, 28, 1, 0, false)
440 MUX_CFG(DM646X, CRGMUX, 0, 24, 7, 5, true)
442 MUX_CFG(DM646X, STSOMUX_DISABLE, 0, 22, 3, 0, true)
444 MUX_CFG(DM646X, STSIMUX_DISABLE, 0, 20, 3, 0, true)
446 MUX_CFG(DM646X, PTSOMUX_DISABLE, 0, 18, 3, 0, true)
448 MUX_CFG(DM646X, PTSIMUX_DISABLE, 0, 16, 3, 0, true)
450 MUX_CFG(DM646X, STSOMUX, 0, 22, 3, 2, true)
452 MUX_CFG(DM646X, STSIMUX, 0, 20, 3, 2, true)
[all …]
Dmux.h18 #define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\ macro
/arch/arm/plat-omap/include/plat/
Dmux.h88 #define MUX_CFG(desc, mux_reg, mode_offset, mode, \ macro