| /arch/sh/boards/mach-highlander/ |
| D | irq-r7780rp.c | 23 PSW, /* Push Switch */ enumerator
38 INTC_IRQ(PSW, IRQ_PSW),
45 0, 0, 0, 0, 0, 0, PSW, AX88796 } },
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| D | irq-r7780mp.c | 28 PSW, /* Push Switch */ enumerator
42 INTC_IRQ(PSW, IRQ_PSW),
52 0, EXT6, EXT5, EXT4, EXT2, EXT1, PSW, AX88796 } },
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| /arch/m32r/kernel/ |
| D | entry.S | 102 #define PSW(reg) @(0x4C,reg) macro
146 ld r4, PSW(sp)
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| D | head.S | 187 ;; clear PSW
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| /arch/s390/kernel/ |
| D | head_kdump.S | 87 mvc 0(8,%r0),.Lrestart_psw-0b(%r13) # Setup restart PSW
88 mvc 464(16,%r0),.Lpgm_psw-0b(%r13) # Setup pgm check PSW
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| D | base.S | 91 larl %r4,.Lrestart_psw # Setup restart PSW at absolute 0
93 lg %r4,0(%r4) # Save PSW
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| D | head.S | 39 .long 0x00080000,0x80000000+startup # Just a restart PSW
46 .long 0x02000000,0x20000000+IPL_BS # (a PSW and two CCWs).
160 .long 0x02000068,0x60000050 # (a PSW and two CCWs).
170 .long 0x02000370,0x60000050 # the channel program the PSW
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| D | sclp.S | 85 .long 0, 0, 0, 0 # old ext int PSW
87 .long 0x00080000, 0x80000000+.LwaitS1 # PSW to handle ext int
90 .quad 0x0000000180000000, .LwaitS1 # PSW to handle ext int, 64 bit
93 .long 0x010a0000, 0x00000000+.LloopS1 # PSW to wait for ext int
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| D | entry.S | 386 tmh %r8,0x4000 # PER bit set in old PSW ?
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| D | entry64.S | 399 tmhh %r8,0x4000 # PER bit set in old PSW ?
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| /arch/m32r/platforms/oaks32r/ |
| D | dot.gdbinit.nommu | 82 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
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| /arch/m32r/platforms/mappi2/ |
| D | dot.gdbinit.vdec2 | 151 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
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| /arch/m32r/platforms/mappi3/ |
| D | dot.gdbinit | 140 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
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| /arch/m32r/platforms/m32700ut/ |
| D | dot.gdbinit_400MHz_32MB | 152 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
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| D | dot.gdbinit_200MHz_16MB | 152 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
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| D | dot.gdbinit_300MHz_32MB | 152 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
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| /arch/m32r/platforms/mappi/ |
| D | dot.gdbinit.nommu | 168 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
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| D | dot.gdbinit | 168 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
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| D | dot.gdbinit.smp | 236 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
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| /arch/m32r/platforms/opsput/ |
| D | dot.gdbinit | 177 printf "PSW[%08lx] CBR[%08lx] SPI[%08lx] SPU[%08lx]\n",$psw,$cbr,$spi,$spu
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