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Searched refs:WDT (Results 1 – 16 of 16) sorted by relevance

/arch/sh/kernel/cpu/sh4/
Dsetup-sh4-202.c150 HUDI, TMU0, TMU1, TMU2, RTC, SCIF, WDT, enumerator
161 INTC_VECT(WDT, 0x560),
166 { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, 0, 0, 0 } },
Dsetup-sh7750.c285 TMU3, TMU4, TMU0, TMU1, TMU2, RTC, SCI1, SCIF, WDT, REF, enumerator
301 INTC_VECT(WDT, 0x560),
307 { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, REF, SCI1, 0 } },
Dsetup-sh7760.c38 WDT, REF, enumerator
75 INTC_VECT(WDT, 0x560),
106 { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } },
/arch/sh/kernel/cpu/sh3/
Dsetup-sh7710.c29 RTC, WDT, REF, enumerator
54 INTC_VECT(WDT, 0x560),
60 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } },
Dsetup-sh7705.c32 RTC, WDT, REF_RCMI, enumerator
52 INTC_VECT(WDT, 0x560),
58 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
Dsetup-sh770x.c33 RTC, WDT, REF, enumerator
43 INTC_VECT(WDT, 0x560),
70 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, SCI, 0 } },
Dsetup-sh7720.c408 WDT, REF_RCMI, SIM, enumerator
427 INTC_VECT(WDT, 0x560), INTC_VECT(REF_RCMI, 0x580),
452 { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
/arch/sh/kernel/cpu/sh2/
Dsetup-sh7619.c23 WDT, EDMAC, CMT0, CMT1, enumerator
35 INTC_IRQ(WDT, 84), INTC_IRQ(EDMAC, 85),
52 { 0xf8080000, 0, 16, 4, /* IPRC */ { WDT, EDMAC, CMT0, CMT1 } },
/arch/sh/kernel/cpu/sh2a/
Dsetup-sh7206.c32 CMT0, CMT1, BSC, WDT, enumerator
63 INTC_IRQ(BSC, 148), INTC_IRQ(WDT, 152),
114 { 0xfffe0c04, 0, 16, 4, /* IPR08 */ { CMT0, CMT1, BSC, WDT } },
Dsetup-sh7201.c30 RTC, WDT, enumerator
93 INTC_IRQ(WDT, 156),
161 { 0xfffe9806, 0, 16, 4, /* IPR09 */ { RTC, WDT, IIC30, 0 } },
Dsetup-sh7203.c24 USB, LCDC, CMT0, CMT1, BSC, WDT, enumerator
65 INTC_IRQ(BSC, 144), INTC_IRQ(WDT, 145),
146 { 0xfffe0c06, 0, 16, 4, /* IPR09 */ { BSC, WDT, MTU0_ABCD, MTU0_VEF } },
/arch/sh/kernel/cpu/sh4a/
Dsetup-sh7763.c357 RTC, WDT, TMU0, TMU1, TMU2, TMU2_TICPI, enumerator
373 INTC_VECT(WDT, 0x560), INTC_VECT(TMU0, 0x580),
423 HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } },
435 { 0xffd40008, 0, 32, 8, /* INT2PRI2 */ { SCIF0, SCIF1, WDT } },
Dsetup-sh7780.c425 RTC, WDT, TMU0, TMU1, TMU2, TMU2_TICPI, enumerator
438 INTC_VECT(WDT, 0x560),
481 HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } },
488 { 0xffd40008, 0, 32, 8, /* INT2PRI2 */ { SCIF0, SCIF1, WDT } },
Dsetup-sh7785.c484 WDT, TMU0, TMU1, TMU2, TMU2_TICPI, enumerator
500 INTC_VECT(WDT, 0x560),
562 PCIINTA, PCISERR, HAC1, HAC0, DMAC1, DMAC0, HUDI, WDT,
574 { 0xffd4000c, 0, 32, 8, /* INT2PRI3 */ { SCIF4, SCIF5, WDT, } },
Dsetup-sh7786.c692 WDT, enumerator
724 INTC_VECT(WDT, 0x3e0),
804 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, WDT },
836 { 0xfe410800, 0, 32, 8, /* INT2PRI0 */ { 0, 0, 0, WDT } },
/arch/mips/include/asm/mach-bcm63xx/
Dbcm63xx_cpu.h377 __GEN_RSET_BASE(__cpu, WDT) \