/arch/sh/kernel/cpu/sh4/ |
D | setup-sh4-202.c | 150 HUDI, TMU0, TMU1, TMU2, RTC, SCIF, WDT, enumerator 161 INTC_VECT(WDT, 0x560), 166 { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, 0, 0, 0 } },
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D | setup-sh7750.c | 285 TMU3, TMU4, TMU0, TMU1, TMU2, RTC, SCI1, SCIF, WDT, REF, enumerator 301 INTC_VECT(WDT, 0x560), 307 { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, REF, SCI1, 0 } },
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D | setup-sh7760.c | 38 WDT, REF, enumerator 75 INTC_VECT(WDT, 0x560), 106 { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } },
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/arch/sh/kernel/cpu/sh3/ |
D | setup-sh7710.c | 29 RTC, WDT, REF, enumerator 54 INTC_VECT(WDT, 0x560), 60 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } },
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D | setup-sh7705.c | 32 RTC, WDT, REF_RCMI, enumerator 52 INTC_VECT(WDT, 0x560), 58 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
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D | setup-sh770x.c | 33 RTC, WDT, REF, enumerator 43 INTC_VECT(WDT, 0x560), 70 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, SCI, 0 } },
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D | setup-sh7720.c | 408 WDT, REF_RCMI, SIM, enumerator 427 INTC_VECT(WDT, 0x560), INTC_VECT(REF_RCMI, 0x580), 452 { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
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/arch/sh/kernel/cpu/sh2/ |
D | setup-sh7619.c | 23 WDT, EDMAC, CMT0, CMT1, enumerator 35 INTC_IRQ(WDT, 84), INTC_IRQ(EDMAC, 85), 52 { 0xf8080000, 0, 16, 4, /* IPRC */ { WDT, EDMAC, CMT0, CMT1 } },
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/arch/sh/kernel/cpu/sh2a/ |
D | setup-sh7206.c | 32 CMT0, CMT1, BSC, WDT, enumerator 63 INTC_IRQ(BSC, 148), INTC_IRQ(WDT, 152), 114 { 0xfffe0c04, 0, 16, 4, /* IPR08 */ { CMT0, CMT1, BSC, WDT } },
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D | setup-sh7201.c | 30 RTC, WDT, enumerator 93 INTC_IRQ(WDT, 156), 161 { 0xfffe9806, 0, 16, 4, /* IPR09 */ { RTC, WDT, IIC30, 0 } },
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D | setup-sh7203.c | 24 USB, LCDC, CMT0, CMT1, BSC, WDT, enumerator 65 INTC_IRQ(BSC, 144), INTC_IRQ(WDT, 145), 146 { 0xfffe0c06, 0, 16, 4, /* IPR09 */ { BSC, WDT, MTU0_ABCD, MTU0_VEF } },
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/arch/sh/kernel/cpu/sh4a/ |
D | setup-sh7763.c | 357 RTC, WDT, TMU0, TMU1, TMU2, TMU2_TICPI, enumerator 373 INTC_VECT(WDT, 0x560), INTC_VECT(TMU0, 0x580), 423 HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } }, 435 { 0xffd40008, 0, 32, 8, /* INT2PRI2 */ { SCIF0, SCIF1, WDT } },
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D | setup-sh7780.c | 425 RTC, WDT, TMU0, TMU1, TMU2, TMU2_TICPI, enumerator 438 INTC_VECT(WDT, 0x560), 481 HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } }, 488 { 0xffd40008, 0, 32, 8, /* INT2PRI2 */ { SCIF0, SCIF1, WDT } },
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D | setup-sh7785.c | 484 WDT, TMU0, TMU1, TMU2, TMU2_TICPI, enumerator 500 INTC_VECT(WDT, 0x560), 562 PCIINTA, PCISERR, HAC1, HAC0, DMAC1, DMAC0, HUDI, WDT, 574 { 0xffd4000c, 0, 32, 8, /* INT2PRI3 */ { SCIF4, SCIF5, WDT, } },
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D | setup-sh7786.c | 692 WDT, enumerator 724 INTC_VECT(WDT, 0x3e0), 804 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, WDT }, 836 { 0xfe410800, 0, 32, 8, /* INT2PRI0 */ { 0, 0, 0, WDT } },
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/arch/mips/include/asm/mach-bcm63xx/ |
D | bcm63xx_cpu.h | 377 __GEN_RSET_BASE(__cpu, WDT) \
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