/arch/sh/kernel/cpu/sh4/ |
D | probe.c | 38 boot_cpu_data.icache.way_incr = (1 << 13); in cpu_probe() 39 boot_cpu_data.icache.entry_shift = 5; in cpu_probe() 40 boot_cpu_data.icache.sets = 256; in cpu_probe() 41 boot_cpu_data.icache.ways = 1; in cpu_probe() 42 boot_cpu_data.icache.linesz = L1_CACHE_BYTES; in cpu_probe() 47 boot_cpu_data.dcache.way_incr = (1 << 14); in cpu_probe() 48 boot_cpu_data.dcache.entry_shift = 5; in cpu_probe() 49 boot_cpu_data.dcache.sets = 512; in cpu_probe() 50 boot_cpu_data.dcache.ways = 1; in cpu_probe() 51 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; in cpu_probe() [all …]
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/arch/sh/kernel/cpu/sh2a/ |
D | probe.c | 18 boot_cpu_data.family = CPU_FAMILY_SH2A; in cpu_probe() 21 boot_cpu_data.flags |= CPU_HAS_OP32; in cpu_probe() 24 boot_cpu_data.type = CPU_SH7201; in cpu_probe() 25 boot_cpu_data.flags |= CPU_HAS_FPU; in cpu_probe() 27 boot_cpu_data.type = CPU_SH7203; in cpu_probe() 28 boot_cpu_data.flags |= CPU_HAS_FPU; in cpu_probe() 30 boot_cpu_data.type = CPU_SH7263; in cpu_probe() 31 boot_cpu_data.flags |= CPU_HAS_FPU; in cpu_probe() 33 boot_cpu_data.type = CPU_SH7206; in cpu_probe() 34 boot_cpu_data.flags |= CPU_HAS_DSP; in cpu_probe() [all …]
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/arch/sh/kernel/cpu/sh5/ |
D | probe.c | 32 boot_cpu_data.type = CPU_SH5_103; in cpu_probe() 35 boot_cpu_data.type = CPU_SH5_101; in cpu_probe() 37 boot_cpu_data.family = CPU_FAMILY_SH5; in cpu_probe() 42 boot_cpu_data.icache.ways = 4; in cpu_probe() 43 boot_cpu_data.icache.sets = 256; in cpu_probe() 44 boot_cpu_data.icache.linesz = L1_CACHE_BYTES; in cpu_probe() 45 boot_cpu_data.icache.way_incr = (1 << 13); in cpu_probe() 46 boot_cpu_data.icache.entry_shift = 5; in cpu_probe() 47 boot_cpu_data.icache.way_size = boot_cpu_data.icache.sets * in cpu_probe() 48 boot_cpu_data.icache.linesz; in cpu_probe() [all …]
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/arch/sh/kernel/cpu/sh3/ |
D | probe.c | 53 boot_cpu_data.dcache.ways = 4; in cpu_probe() 54 boot_cpu_data.dcache.entry_shift = 4; in cpu_probe() 55 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; in cpu_probe() 56 boot_cpu_data.dcache.flags = 0; in cpu_probe() 63 boot_cpu_data.dcache.way_incr = (1 << 11); in cpu_probe() 64 boot_cpu_data.dcache.entry_mask = 0x7f0; in cpu_probe() 65 boot_cpu_data.dcache.sets = 128; in cpu_probe() 66 boot_cpu_data.type = CPU_SH7708; in cpu_probe() 68 boot_cpu_data.flags |= CPU_HAS_MMU_PAGE_ASSOC; in cpu_probe() 70 boot_cpu_data.dcache.way_incr = (1 << 12); in cpu_probe() [all …]
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/arch/sh/kernel/cpu/sh2/ |
D | probe.c | 19 boot_cpu_data.type = CPU_SH7619; in cpu_probe() 20 boot_cpu_data.dcache.ways = 4; in cpu_probe() 21 boot_cpu_data.dcache.way_incr = (1<<12); in cpu_probe() 22 boot_cpu_data.dcache.sets = 256; in cpu_probe() 23 boot_cpu_data.dcache.entry_shift = 4; in cpu_probe() 24 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; in cpu_probe() 25 boot_cpu_data.dcache.flags = 0; in cpu_probe() 30 boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED; in cpu_probe() 31 boot_cpu_data.icache = boot_cpu_data.dcache; in cpu_probe() 32 boot_cpu_data.family = CPU_FAMILY_SH2; in cpu_probe()
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/arch/parisc/kernel/ |
D | processor.c | 45 struct system_cpuinfo_parisc boot_cpu_data __read_mostly; 46 EXPORT_SYMBOL(boot_cpu_data); 107 if (boot_cpu_data.cpu_count > 0) { in processor_probe() 116 cpuid = boot_cpu_data.cpu_count; in processor_probe() 163 boot_cpu_data.cpu_count--; in processor_probe() 173 boot_cpu_data.cpu_count++; in processor_probe() 244 memset(&boot_cpu_data, 0, sizeof(boot_cpu_data)); in collect_boot_cpu_data() 246 boot_cpu_data.cpu_hz = 100 * PAGE0->mem_10msec; /* Hz of this PARISC */ in collect_boot_cpu_data() 249 #define p ((unsigned long *)&boot_cpu_data.pdc.model) in collect_boot_cpu_data() 250 if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK) in collect_boot_cpu_data() [all …]
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D | setup.c | 90 switch (boot_cpu_data.cpu_type) { in dma_ops_init() 205 switch (boot_cpu_data.cpu_type) { in parisc_proc_mkdir() 320 boot_cpu_data.cpu_name, in parisc_init() 321 boot_cpu_data.cpu_hz / 1000000, in parisc_init() 322 boot_cpu_data.cpu_hz % 1000000 ); in parisc_init()
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D | perf.c | 508 if (boot_cpu_data.cpu_type == pcxu || in perf_init() 509 boot_cpu_data.cpu_type == pcxu_) { in perf_init() 511 } else if (boot_cpu_data.cpu_type == pcxw || in perf_init() 512 boot_cpu_data.cpu_type == pcxw_ || in perf_init() 513 boot_cpu_data.cpu_type == pcxw2 || in perf_init() 514 boot_cpu_data.cpu_type == mako || in perf_init() 515 boot_cpu_data.cpu_type == mako2) { in perf_init() 517 if (boot_cpu_data.cpu_type == pcxw2 || in perf_init() 518 boot_cpu_data.cpu_type == mako || in perf_init() 519 boot_cpu_data.cpu_type == mako2) in perf_init()
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/arch/sh/mm/ |
D | cache.c | 62 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && in copy_to_user_page() 69 if (boot_cpu_data.dcache.n_aliases) in copy_to_user_page() 81 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && in copy_from_user_page() 88 if (boot_cpu_data.dcache.n_aliases) in copy_from_user_page() 100 if (boot_cpu_data.dcache.n_aliases && page_mapped(from) && in copy_user_highpage() 140 if (!boot_cpu_data.dcache.n_aliases) in __update_cache() 156 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && in __flush_anon_page() 177 if (boot_cpu_data.dcache.n_aliases == 0) in flush_cache_mm() 185 if (boot_cpu_data.dcache.n_aliases == 0) in flush_cache_dup_mm() 253 boot_cpu_data.icache.ways, in emit_cache_params() [all …]
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D | cache-shx3.c | 27 if (boot_cpu_data.dcache.n_aliases || boot_cpu_data.icache.n_aliases) { in shx3_cache_init() 30 boot_cpu_data.icache.n_aliases = 0; in shx3_cache_init() 31 boot_cpu_data.dcache.n_aliases = 0; in shx3_cache_init()
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/arch/x86/kernel/cpu/ |
D | bugs.c | 23 boot_cpu_data.hlt_works_ok = 0; in no_halt() 31 boot_cpu_data.hard_math = 0; in no_387() 56 if (!boot_cpu_data.hard_math) { in check_fpu() 87 boot_cpu_data.fdiv_bug = fdiv_bug; in check_fpu() 88 if (boot_cpu_data.fdiv_bug) in check_fpu() 94 if (boot_cpu_data.x86 >= 5 || paravirt_enabled()) in check_hlt() 98 if (!boot_cpu_data.hlt_works_ok) { in check_hlt() 154 if (boot_cpu_data.x86 == 3) in check_config() 165 print_cpu_info(&boot_cpu_data); in check_bugs() 172 '0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86); in check_bugs()
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D | perfctr-watchdog.c | 47 switch (boot_cpu_data.x86_vendor) { in nmi_perfctr_msr_to_bit() 53 if (cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON)) in nmi_perfctr_msr_to_bit() 56 switch (boot_cpu_data.x86) { in nmi_perfctr_msr_to_bit() 73 switch (boot_cpu_data.x86_vendor) { in nmi_evntsel_msr_to_bit() 79 if (cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON)) in nmi_evntsel_msr_to_bit() 82 switch (boot_cpu_data.x86) { in nmi_evntsel_msr_to_bit()
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D | match.c | 34 struct cpuinfo_x86 *c = &boot_cpu_data; in x86_match_cpu() 61 boot_cpu_data.x86_vendor, in arch_print_cpu_modalias() 62 boot_cpu_data.x86, in arch_print_cpu_modalias() 63 boot_cpu_data.x86_model); in arch_print_cpu_modalias()
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/arch/x86/include/asm/ |
D | geode.h | 19 return ((boot_cpu_data.x86_vendor == X86_VENDOR_NSC) && in is_geode_gx() 20 (boot_cpu_data.x86 == 5) && in is_geode_gx() 21 (boot_cpu_data.x86_model == 5)); in is_geode_gx() 26 return ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && in is_geode_lx() 27 (boot_cpu_data.x86 == 5) && in is_geode_lx() 28 (boot_cpu_data.x86_model == 10)); in is_geode_lx()
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D | acpi.h | 137 if (boot_cpu_data.x86 == 0x0F && in acpi_processor_cstate_check() 138 boot_cpu_data.x86_vendor == X86_VENDOR_AMD && in acpi_processor_cstate_check() 139 boot_cpu_data.x86_model <= 0x05 && in acpi_processor_cstate_check() 140 boot_cpu_data.x86_mask < 0x0A) in acpi_processor_cstate_check()
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/arch/avr32/kernel/ |
D | cpu.c | 270 boot_cpu_data.arch_type = arch_id; in setup_processor() 271 boot_cpu_data.cpu_type = cpu_id; in setup_processor() 272 boot_cpu_data.arch_revision = arch_rev; in setup_processor() 273 boot_cpu_data.cpu_revision = cpu_rev; in setup_processor() 274 boot_cpu_data.tlb_config = mmu_type; in setup_processor() 275 boot_cpu_data.device_id = device_id; in setup_processor() 279 boot_cpu_data.icache.ways = 1 << SYSREG_BFEXT(IASS, config1); in setup_processor() 280 boot_cpu_data.icache.sets = 1 << SYSREG_BFEXT(ISET, config1); in setup_processor() 281 boot_cpu_data.icache.linesz = 1 << (tmp + 1); in setup_processor() 285 boot_cpu_data.dcache.ways = 1 << SYSREG_BFEXT(DASS, config1); in setup_processor() [all …]
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/arch/xtensa/include/asm/ |
D | smp.h | 14 extern struct xtensa_cpuinfo boot_cpu_data; 16 #define cpu_data (&boot_cpu_data) 17 #define current_cpu_data boot_cpu_data
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/arch/x86/kernel/ |
D | amd_nb.c | 81 if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10 || in amd_cache_northbridges() 82 boot_cpu_data.x86 == 0x15) in amd_cache_northbridges() 89 if (boot_cpu_data.x86 == 0x10 && in amd_cache_northbridges() 90 boot_cpu_data.x86_model >= 0x8 && in amd_cache_northbridges() 91 (boot_cpu_data.x86_model > 0x9 || in amd_cache_northbridges() 92 boot_cpu_data.x86_mask >= 0x1)) in amd_cache_northbridges() 95 if (boot_cpu_data.x86 == 0x15) in amd_cache_northbridges() 99 if (boot_cpu_data.x86 == 0x15) in amd_cache_northbridges() 128 if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) in amd_get_mmconfig_range() 132 if (boot_cpu_data.x86 < 0x10) in amd_get_mmconfig_range()
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/arch/avr32/mm/ |
D | cache.c | 28 linesz = boot_cpu_data.dcache.linesz; in invalidate_dcache_region() 56 linesz = boot_cpu_data.dcache.linesz; in clean_dcache_region() 69 linesz = boot_cpu_data.dcache.linesz; in flush_dcache_region() 82 linesz = boot_cpu_data.icache.linesz; in invalidate_icache_region() 94 linesz = boot_cpu_data.dcache.linesz; in __flush_icache_range() 110 linesz = boot_cpu_data.dcache.linesz; in flush_icache_range()
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/arch/m32r/include/asm/ |
D | processor.h | 44 extern struct cpuinfo_m32r boot_cpu_data; 50 #define cpu_data (&boot_cpu_data) 51 #define current_cpu_data boot_cpu_data
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/arch/um/include/asm/ |
D | processor-generic.h | 122 extern struct cpuinfo_um boot_cpu_data; 130 #define cpu_data (&boot_cpu_data) 131 #define current_cpu_data boot_cpu_data
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/arch/frv/include/asm/ |
D | processor.h | 48 extern struct cpuinfo_frv __nongprelbss boot_cpu_data; 50 #define cpu_data (&boot_cpu_data) 51 #define current_cpu_data boot_cpu_data
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/arch/avr32/mach-at32ap/ |
D | cpufreq.c | 69 loops_per_jiffy_ref = boot_cpu_data.loops_per_jiffy; in at32_set_target() 74 boot_cpu_data.loops_per_jiffy = cpufreq_scale( in at32_set_target() 78 boot_cpu_data.loops_per_jiffy = cpufreq_scale( in at32_set_target()
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/arch/mn10300/include/asm/ |
D | processor.h | 55 extern struct mn10300_cpuinfo boot_cpu_data; 64 #define cpu_data &boot_cpu_data 65 #define current_cpu_data boot_cpu_data
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/arch/x86/kernel/cpu/mtrr/ |
D | main.c | 615 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && in mtrr_bp_init() 616 boot_cpu_data.x86 == 0xF && in mtrr_bp_init() 617 boot_cpu_data.x86_model == 0x3 && in mtrr_bp_init() 618 (boot_cpu_data.x86_mask == 0x3 || in mtrr_bp_init() 619 boot_cpu_data.x86_mask == 0x4)) in mtrr_bp_init() 624 } else if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR && in mtrr_bp_init() 625 boot_cpu_data.x86 == 6) { in mtrr_bp_init() 635 switch (boot_cpu_data.x86_vendor) { in mtrr_bp_init()
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