Home
last modified time | relevance | path

Searched refs:clk_set_parent (Results 1 – 25 of 54) sorted by relevance

123

/arch/powerpc/kernel/
Dclock.c76 int clk_set_parent(struct clk *clk, struct clk *parent) in clk_set_parent() function
78 if (clk_functions.clk_set_parent) in clk_set_parent()
79 return clk_functions.clk_set_parent(clk, parent); in clk_set_parent()
82 EXPORT_SYMBOL(clk_set_parent);
/arch/powerpc/include/asm/
Dclk_interface.h14 int (*clk_set_parent) (struct clk *clk, struct clk *parent); member
/arch/arm/mach-mxs/
Dclock.c172 int clk_set_parent(struct clk *clk, struct clk *parent) in clk_set_parent() function
199 EXPORT_SYMBOL(clk_set_parent);
Dclock-mx28.c774 clk_set_parent(&ssp0_clk, &ref_io0_clk); in mx28_clocks_init()
775 clk_set_parent(&ssp1_clk, &ref_io0_clk); in mx28_clocks_init()
776 clk_set_parent(&ssp2_clk, &ref_io1_clk); in mx28_clocks_init()
777 clk_set_parent(&ssp3_clk, &ref_io1_clk); in mx28_clocks_init()
785 clk_set_parent(&lcdif_clk, &ref_pix_clk); in mx28_clocks_init()
786 clk_set_parent(&saif0_clk, &pll0_clk); in mx28_clocks_init()
787 clk_set_parent(&saif1_clk, &pll0_clk); in mx28_clocks_init()
/arch/arm/plat-mxc/
Dclock.c162 int clk_set_parent(struct clk *clk, struct clk *parent) in clk_set_parent() function
189 EXPORT_SYMBOL(clk_set_parent);
/arch/arm/mach-msm/
Dclock.c112 int clk_set_parent(struct clk *clk, struct clk *parent) in clk_set_parent() function
116 EXPORT_SYMBOL(clk_set_parent);
/arch/arm/plat-omap/
Dclock.c141 int clk_set_parent(struct clk *clk, struct clk *parent) in clk_set_parent() function
149 if (!arch_clock || !arch_clock->clk_set_parent) in clk_set_parent()
154 ret = arch_clock->clk_set_parent(clk, parent); in clk_set_parent()
163 EXPORT_SYMBOL(clk_set_parent);
/arch/arm/mach-bcmring/
Dclock.c185 int clk_set_parent(struct clk *clk, struct clk *parent) in clk_set_parent() function
223 EXPORT_SYMBOL(clk_set_parent);
/arch/avr32/boards/atstk1000/
Datstk1003.c93 if (clk_set_parent(gclk, pll)) { in atstk1003_setup_extdac()
Datstk1004.c98 if (clk_set_parent(gclk, pll)) { in atstk1004_setup_extdac()
Datstk1002.c226 if (clk_set_parent(gclk, pll)) { in atstk1002_setup_extdac()
/arch/arm/mach-spear6xx/
Dspear6xx.c84 clk_set_parent(gpt_clk, pclk); in spear6xx_timer_init()
/arch/avr32/boards/favr-32/
Dsetup.c289 retval = clk_set_parent(pll1, osc1); in set_abdac_rate()
308 retval = clk_set_parent(abdac, pll1); in set_abdac_rate()
/arch/avr32/mach-at32ap/
Dclock.c159 int clk_set_parent(struct clk *clk, struct clk *parent) in clk_set_parent() function
173 EXPORT_SYMBOL(clk_set_parent);
/arch/arm/plat-s5p/
Ds5p-time.c273 clk_set_parent(tin_event, tdiv_event); in s5p_clockevent_init()
341 clk_set_parent(tin_source, tdiv_source); in s5p_clocksource_init()
/arch/arm/plat-samsung/
Dclock.c174 int clk_set_parent(struct clk *clk, struct clk *parent) in clk_set_parent() function
197 EXPORT_SYMBOL(clk_set_parent);
Dtime.c203 clk_set_parent(tin, tdiv); in s3c2410_timer_setup()
/arch/arm/plat-omap/include/plat/
Dclock.h280 int (*clk_set_parent)(struct clk *clk, struct clk *parent); member
/arch/arm/mach-s3c24xx/
Dclock-s3c2412.c649 clk_set_parent(cip->clk, src); in s3c2412_clk_initparents()
711 clk_set_parent(&clk_usysclk, &clk_upll); in s3c2412_baseclk_add()
712 clk_set_parent(&clk_usbsrc, &clk_usysclk); in s3c2412_baseclk_add()
/arch/arm/mach-tegra/
Dclock.c209 int clk_set_parent(struct clk *c, struct clk *parent) in clk_set_parent() function
234 EXPORT_SYMBOL(clk_set_parent);
351 ret = clk_set_parent(c, p); in tegra_clk_init_one_from_table()
/arch/arm/mach-omap2/
Dmcbsp.c128 r = clk_set_parent(clk, fck_src); in omap2_mcbsp_set_clk_src()
/arch/c6x/platforms/
Dpll.c132 int clk_set_parent(struct clk *clk, struct clk *parent) in clk_set_parent() function
157 EXPORT_SYMBOL(clk_set_parent);
/arch/arm/mach-at91/
Dboard-sam9260ek.c111 clk_set_parent(pck0, plla); in at73c213_set_clk()
/arch/arm/mach-imx/
Dclock-mx51-mx53.c1581 clk_set_parent(&usb_phy1_clk, &osc_clk); in mx51_clocks_init()
1584 clk_set_parent(&usboh3_clk, &pll2_sw_clk); in mx51_clocks_init()
1587 clk_set_parent(&esdhc1_clk, &pll2_sw_clk); in mx51_clocks_init()
1588 clk_set_parent(&esdhc2_clk, &pll2_sw_clk); in mx51_clocks_init()
1615 clk_set_parent(&uart_root_clk, &pll3_sw_clk); in mx53_clocks_init()
1624 clk_set_parent(&esdhc1_clk, &pll2_sw_clk); in mx53_clocks_init()
1625 clk_set_parent(&esdhc3_mx53_clk, &pll2_sw_clk); in mx53_clocks_init()
/arch/arm/mach-s3c2412/
Dcpu-freq.c142 clk_set_parent(armclk, cfg->divs.dvs ? hclk : fclk); in s3c2412_cpufreq_setdivs()

123