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/arch/sh/include/asm/
Dbitops-op32.h11 #define BYTE_NUMBER(nr) ((nr ^ BITOP_LE_SWIZZLE) / BITS_PER_BYTE) argument
12 #define BYTE_OFFSET(nr) ((nr ^ BITOP_LE_SWIZZLE) % BITS_PER_BYTE) argument
14 #define BYTE_NUMBER(nr) ((nr) / BITS_PER_BYTE) argument
15 #define BYTE_OFFSET(nr) ((nr) % BITS_PER_BYTE) argument
18 #define IS_IMMEDIATE(nr) (__builtin_constant_p(nr)) argument
20 static inline void __set_bit(int nr, volatile unsigned long *addr) in __set_bit() argument
22 if (IS_IMMEDIATE(nr)) { in __set_bit()
26 : "i" (BYTE_OFFSET(nr)), "i" (BYTE_NUMBER(nr)) in __set_bit()
30 unsigned long mask = BIT_MASK(nr); in __set_bit()
31 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in __set_bit()
[all …]
Dbitops-grb.h4 static inline void set_bit(int nr, volatile void * addr) in set_bit() argument
10 a += nr >> 5; in set_bit()
11 mask = 1 << (nr & 0x1f); in set_bit()
28 static inline void clear_bit(int nr, volatile void * addr) in clear_bit() argument
34 a += nr >> 5; in clear_bit()
35 mask = ~(1 << (nr & 0x1f)); in clear_bit()
51 static inline void change_bit(int nr, volatile void * addr) in change_bit() argument
57 a += nr >> 5; in change_bit()
58 mask = 1 << (nr & 0x1f); in change_bit()
74 static inline int test_and_set_bit(int nr, volatile void * addr) in test_and_set_bit() argument
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Dbitops-llsc.h4 static inline void set_bit(int nr, volatile void *addr) in set_bit() argument
10 a += nr >> 5; in set_bit()
11 mask = 1 << (nr & 0x1f); in set_bit()
25 static inline void clear_bit(int nr, volatile void *addr) in clear_bit() argument
31 a += nr >> 5; in clear_bit()
32 mask = 1 << (nr & 0x1f); in clear_bit()
46 static inline void change_bit(int nr, volatile void *addr) in change_bit() argument
52 a += nr >> 5; in change_bit()
53 mask = 1 << (nr & 0x1f); in change_bit()
67 static inline int test_and_set_bit(int nr, volatile void *addr) in test_and_set_bit() argument
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/arch/m68k/include/asm/
Dbitops.h30 static inline void bset_reg_set_bit(int nr, volatile unsigned long *vaddr) in bset_reg_set_bit() argument
32 char *p = (char *)vaddr + (nr ^ 31) / 8; in bset_reg_set_bit()
36 : "a" (p), "di" (nr & 7) in bset_reg_set_bit()
40 static inline void bset_mem_set_bit(int nr, volatile unsigned long *vaddr) in bset_mem_set_bit() argument
42 char *p = (char *)vaddr + (nr ^ 31) / 8; in bset_mem_set_bit()
46 : "di" (nr & 7)); in bset_mem_set_bit()
49 static inline void bfset_mem_set_bit(int nr, volatile unsigned long *vaddr) in bfset_mem_set_bit() argument
53 : "d" (nr ^ 31), "o" (*vaddr) in bfset_mem_set_bit()
58 #define set_bit(nr, vaddr) bset_reg_set_bit(nr, vaddr) argument
60 #define set_bit(nr, vaddr) bset_mem_set_bit(nr, vaddr) argument
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/arch/x86/include/asm/
Dbitops.h40 #define IS_IMMEDIATE(nr) (__builtin_constant_p(nr)) argument
41 #define CONST_MASK_ADDR(nr, addr) BITOP_ADDR((void *)(addr) + ((nr)>>3)) argument
42 #define CONST_MASK(nr) (1 << ((nr) & 7)) argument
60 set_bit(unsigned int nr, volatile unsigned long *addr) in set_bit() argument
62 if (IS_IMMEDIATE(nr)) { in set_bit()
64 : CONST_MASK_ADDR(nr, addr) in set_bit()
65 : "iq" ((u8)CONST_MASK(nr)) in set_bit()
69 : BITOP_ADDR(addr) : "Ir" (nr) : "memory"); in set_bit()
82 static inline void __set_bit(int nr, volatile unsigned long *addr) in __set_bit() argument
84 asm volatile("bts %1,%0" : ADDR : "Ir" (nr) : "memory"); in __set_bit()
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Dsync_bitops.h29 static inline void sync_set_bit(int nr, volatile unsigned long *addr) in sync_set_bit() argument
33 : "Ir" (nr) in sync_set_bit()
47 static inline void sync_clear_bit(int nr, volatile unsigned long *addr) in sync_clear_bit() argument
51 : "Ir" (nr) in sync_clear_bit()
64 static inline void sync_change_bit(int nr, volatile unsigned long *addr) in sync_change_bit() argument
68 : "Ir" (nr) in sync_change_bit()
80 static inline int sync_test_and_set_bit(int nr, volatile unsigned long *addr) in sync_test_and_set_bit() argument
86 : "Ir" (nr) : "memory"); in sync_test_and_set_bit()
98 static inline int sync_test_and_clear_bit(int nr, volatile unsigned long *addr) in sync_test_and_clear_bit() argument
104 : "Ir" (nr) : "memory"); in sync_test_and_clear_bit()
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/arch/mn10300/include/asm/
Dbitops.h28 #define __set_bit(nr, addr) \ argument
31 const unsigned shift = (nr) & 7; \
32 _a += (nr) >> 3; \
40 #define set_bit(nr, addr) __set_bit((nr), (addr)) argument
45 #define ___clear_bit(nr, addr) \ argument
48 const unsigned shift = (nr) & 7; \
49 _a += (nr) >> 3; \
57 #define clear_bit(nr, addr) ___clear_bit((nr), (addr)) argument
60 static inline void __clear_bit(unsigned long nr, volatile void *addr) in __clear_bit() argument
65 a += nr >> 5; in __clear_bit()
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/arch/hexagon/include/asm/
Dbitops.h47 static inline int test_and_clear_bit(int nr, volatile void *addr) in test_and_clear_bit() argument
59 : "r" (addr), "r" (nr) in test_and_clear_bit()
71 static inline int test_and_set_bit(int nr, volatile void *addr) in test_and_set_bit() argument
83 : "r" (addr), "r" (nr) in test_and_set_bit()
97 static inline int test_and_change_bit(int nr, volatile void *addr) in test_and_change_bit() argument
109 : "r" (addr), "r" (nr) in test_and_change_bit()
122 static inline void clear_bit(int nr, volatile void *addr) in clear_bit() argument
124 test_and_clear_bit(nr, addr); in clear_bit()
127 static inline void set_bit(int nr, volatile void *addr) in set_bit() argument
129 test_and_set_bit(nr, addr); in set_bit()
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/arch/blackfin/include/asm/
Dbitops.h47 asmlinkage int __raw_bit_set_asm(volatile unsigned long *addr, int nr);
49 asmlinkage int __raw_bit_clear_asm(volatile unsigned long *addr, int nr);
51 asmlinkage int __raw_bit_toggle_asm(volatile unsigned long *addr, int nr);
53 asmlinkage int __raw_bit_test_set_asm(volatile unsigned long *addr, int nr);
55 asmlinkage int __raw_bit_test_clear_asm(volatile unsigned long *addr, int nr);
57 asmlinkage int __raw_bit_test_toggle_asm(volatile unsigned long *addr, int nr);
59 asmlinkage int __raw_bit_test_asm(const volatile unsigned long *addr, int nr);
61 static inline void set_bit(int nr, volatile unsigned long *addr) in set_bit() argument
63 volatile unsigned long *a = addr + (nr >> 5); in set_bit()
64 __raw_bit_set_asm(a, nr & 0x1f); in set_bit()
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/arch/frv/include/asm/
Dbitops.h115 static inline int test_and_clear_bit(unsigned long nr, volatile void *addr) in test_and_clear_bit() argument
118 unsigned long mask = 1UL << (nr & 31); in test_and_clear_bit()
119 ptr += nr >> 5; in test_and_clear_bit()
123 static inline int test_and_set_bit(unsigned long nr, volatile void *addr) in test_and_set_bit() argument
126 unsigned long mask = 1UL << (nr & 31); in test_and_set_bit()
127 ptr += nr >> 5; in test_and_set_bit()
131 static inline int test_and_change_bit(unsigned long nr, volatile void *addr) in test_and_change_bit() argument
134 unsigned long mask = 1UL << (nr & 31); in test_and_change_bit()
135 ptr += nr >> 5; in test_and_change_bit()
139 static inline void clear_bit(unsigned long nr, volatile void *addr) in clear_bit() argument
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/arch/alpha/include/asm/
Dbitops.h28 set_bit(unsigned long nr, volatile void * addr) in set_bit() argument
31 int *m = ((int *) addr) + (nr >> 5); in set_bit()
42 :"Ir" (1UL << (nr & 31)), "m" (*m)); in set_bit()
49 __set_bit(unsigned long nr, volatile void * addr) in __set_bit() argument
51 int *m = ((int *) addr) + (nr >> 5); in __set_bit()
53 *m |= 1 << (nr & 31); in __set_bit()
60 clear_bit(unsigned long nr, volatile void * addr) in clear_bit() argument
63 int *m = ((int *) addr) + (nr >> 5); in clear_bit()
74 :"Ir" (1UL << (nr & 31)), "m" (*m)); in clear_bit()
78 clear_bit_unlock(unsigned long nr, volatile void * addr) in clear_bit_unlock() argument
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Dioctl.h39 #define _IOC(dir,type,nr,size) \ argument
43 ((nr) << _IOC_NRSHIFT) | \
47 #define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0) argument
48 #define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size)) argument
49 #define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size)) argument
50 #define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size)) argument
53 #define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) argument
54 #define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK) argument
55 #define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK) argument
56 #define _IOC_SIZE(nr) (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK) argument
/arch/tile/include/asm/
Dbitops_32.h36 static inline void set_bit(unsigned nr, volatile unsigned long *addr) in set_bit() argument
38 _atomic_or(addr + BIT_WORD(nr), BIT_MASK(nr)); in set_bit()
55 static inline void clear_bit(unsigned nr, volatile unsigned long *addr) in clear_bit() argument
57 _atomic_andn(addr + BIT_WORD(nr), BIT_MASK(nr)); in clear_bit()
70 static inline void change_bit(unsigned nr, volatile unsigned long *addr) in change_bit() argument
72 _atomic_xor(addr + BIT_WORD(nr), BIT_MASK(nr)); in change_bit()
83 static inline int test_and_set_bit(unsigned nr, volatile unsigned long *addr) in test_and_set_bit() argument
85 unsigned long mask = BIT_MASK(nr); in test_and_set_bit()
86 addr += BIT_WORD(nr); in test_and_set_bit()
99 static inline int test_and_clear_bit(unsigned nr, volatile unsigned long *addr) in test_and_clear_bit() argument
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Dbitops_64.h23 static inline void set_bit(unsigned nr, volatile unsigned long *addr) in set_bit() argument
25 unsigned long mask = (1UL << (nr % BITS_PER_LONG)); in set_bit()
26 __insn_fetchor((void *)(addr + nr / BITS_PER_LONG), mask); in set_bit()
29 static inline void clear_bit(unsigned nr, volatile unsigned long *addr) in clear_bit() argument
31 unsigned long mask = (1UL << (nr % BITS_PER_LONG)); in clear_bit()
32 __insn_fetchand((void *)(addr + nr / BITS_PER_LONG), ~mask); in clear_bit()
39 static inline void change_bit(unsigned nr, volatile unsigned long *addr) in change_bit() argument
41 unsigned long mask = (1UL << (nr % BITS_PER_LONG)); in change_bit()
43 addr += nr / BITS_PER_LONG; in change_bit()
60 static inline int test_and_set_bit(unsigned nr, volatile unsigned long *addr) in test_and_set_bit() argument
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/arch/powerpc/include/asm/
Dbitops.h55 #define BITOP_MASK(nr) (1UL << ((nr) % BITS_PER_LONG)) argument
56 #define BITOP_WORD(nr) ((nr) / BITS_PER_LONG) argument
84 static __inline__ void set_bit(int nr, volatile unsigned long *addr) in set_bit() argument
86 set_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr)); in set_bit()
89 static __inline__ void clear_bit(int nr, volatile unsigned long *addr) in clear_bit() argument
91 clear_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr)); in clear_bit()
94 static __inline__ void clear_bit_unlock(int nr, volatile unsigned long *addr) in clear_bit_unlock() argument
96 clear_bits_unlock(BITOP_MASK(nr), addr + BITOP_WORD(nr)); in clear_bit_unlock()
99 static __inline__ void change_bit(int nr, volatile unsigned long *addr) in change_bit() argument
101 change_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr)); in change_bit()
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/arch/sparc/include/asm/
Dioctl.h38 #define _IOC(dir,type,nr,size) \ argument
41 ((nr) << _IOC_NRSHIFT) | \
44 #define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0) argument
45 #define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size)) argument
46 #define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size)) argument
47 #define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size)) argument
50 #define _IOC_DIR(nr) \ argument
51 ( (((((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) & (_IOC_WRITE|_IOC_READ)) != 0)? \
52 (((nr) >> _IOC_DIRSHIFT) & (_IOC_WRITE|_IOC_READ)): \
53 (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) )
[all …]
Dbitops_32.h31 static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *addr) in test_and_set_bit() argument
35 ADDR = ((unsigned long *) addr) + (nr >> 5); in test_and_set_bit()
36 mask = 1 << (nr & 31); in test_and_set_bit()
41 static inline void set_bit(unsigned long nr, volatile unsigned long *addr) in set_bit() argument
45 ADDR = ((unsigned long *) addr) + (nr >> 5); in set_bit()
46 mask = 1 << (nr & 31); in set_bit()
51 static inline int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) in test_and_clear_bit() argument
55 ADDR = ((unsigned long *) addr) + (nr >> 5); in test_and_clear_bit()
56 mask = 1 << (nr & 31); in test_and_clear_bit()
61 static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) in clear_bit() argument
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/arch/s390/include/asm/
Dbitops.h115 static inline void set_bit_cs(unsigned long nr, volatile unsigned long *ptr) in set_bit_cs() argument
121 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3; in set_bit_cs()
123 mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1)); in set_bit_cs()
131 static inline void clear_bit_cs(unsigned long nr, volatile unsigned long *ptr) in clear_bit_cs() argument
137 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3; in clear_bit_cs()
139 mask = ~(1UL << (nr & (__BITOPS_WORDSIZE - 1))); in clear_bit_cs()
147 static inline void change_bit_cs(unsigned long nr, volatile unsigned long *ptr) in change_bit_cs() argument
153 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3; in change_bit_cs()
155 mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1)); in change_bit_cs()
164 test_and_set_bit_cs(unsigned long nr, volatile unsigned long *ptr) in test_and_set_bit_cs() argument
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Debcdic.h25 codepage_convert(const __u8 *codepage, volatile __u8 * addr, unsigned long nr) in codepage_convert() argument
27 if (nr-- <= 0) in codepage_convert()
37 : "+&a" (addr), "+&a" (nr) in codepage_convert()
41 #define ASCEBC(addr,nr) codepage_convert(_ascebc, addr, nr) argument
42 #define EBCASC(addr,nr) codepage_convert(_ebcasc, addr, nr) argument
43 #define ASCEBC_500(addr,nr) codepage_convert(_ascebc_500, addr, nr) argument
44 #define EBCASC_500(addr,nr) codepage_convert(_ebcasc_500, addr, nr) argument
45 #define EBC_TOLOWER(addr,nr) codepage_convert(_ebc_tolower, addr, nr) argument
46 #define EBC_TOUPPER(addr,nr) codepage_convert(_ebc_toupper, addr, nr) argument
/arch/ia64/include/asm/
Dsync_bitops.h13 static inline void sync_set_bit(int nr, volatile void *addr) in sync_set_bit() argument
15 set_bit(nr, addr); in sync_set_bit()
18 static inline void sync_clear_bit(int nr, volatile void *addr) in sync_clear_bit() argument
20 clear_bit(nr, addr); in sync_clear_bit()
23 static inline void sync_change_bit(int nr, volatile void *addr) in sync_change_bit() argument
25 change_bit(nr, addr); in sync_change_bit()
28 static inline int sync_test_and_set_bit(int nr, volatile void *addr) in sync_test_and_set_bit() argument
30 return test_and_set_bit(nr, addr); in sync_test_and_set_bit()
33 static inline int sync_test_and_clear_bit(int nr, volatile void *addr) in sync_test_and_clear_bit() argument
35 return test_and_clear_bit(nr, addr); in sync_test_and_clear_bit()
[all …]
Dbitops.h38 set_bit (int nr, volatile void *addr) in set_bit() argument
44 m = (volatile __u32 *) addr + (nr >> 5); in set_bit()
45 bit = 1 << (nr & 31); in set_bit()
63 __set_bit (int nr, volatile void *addr) in __set_bit() argument
65 *((__u32 *) addr + (nr >> 5)) |= (1 << (nr & 31)); in __set_bit()
85 clear_bit (int nr, volatile void *addr) in clear_bit() argument
91 m = (volatile __u32 *) addr + (nr >> 5); in clear_bit()
92 mask = ~(1 << (nr & 31)); in clear_bit()
109 clear_bit_unlock (int nr, volatile void *addr) in clear_bit_unlock() argument
115 m = (volatile __u32 *) addr + (nr >> 5); in clear_bit_unlock()
[all …]
/arch/avr32/include/asm/
Dbitops.h34 static inline void set_bit(int nr, volatile void * addr) in set_bit() argument
36 unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG; in set_bit()
39 if (__builtin_constant_p(nr)) { in set_bit()
47 : "m"(*p), "i"(nr) in set_bit()
50 unsigned long mask = 1UL << (nr % BITS_PER_LONG); in set_bit()
73 static inline void clear_bit(int nr, volatile void * addr) in clear_bit() argument
75 unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG; in clear_bit()
78 if (__builtin_constant_p(nr)) { in clear_bit()
86 : "m"(*p), "i"(nr) in clear_bit()
89 unsigned long mask = 1UL << (nr % BITS_PER_LONG); in clear_bit()
[all …]
/arch/x86/boot/
Dbitops.h19 static inline int constant_test_bit(int nr, const void *addr) in constant_test_bit() argument
22 return ((1UL << (nr & 31)) & (p[nr >> 5])) != 0; in constant_test_bit()
24 static inline int variable_test_bit(int nr, const void *addr) in variable_test_bit() argument
29 asm("btl %2,%1; setc %0" : "=qm" (v) : "m" (*p), "Ir" (nr)); in variable_test_bit()
33 #define test_bit(nr,addr) \ argument
34 (__builtin_constant_p(nr) ? \
35 constant_test_bit((nr),(addr)) : \
36 variable_test_bit((nr),(addr)))
38 static inline void set_bit(int nr, void *addr) in set_bit() argument
40 asm("btsl %1,%0" : "+m" (*(u32 *)addr) : "Ir" (nr)); in set_bit()
/arch/h8300/include/asm/
Dbitops.h45 static __inline__ void FNAME(int nr, volatile unsigned long* addr) \
48 b_addr = (volatile unsigned char *)addr + ((nr >> 3) ^ 3); \
49 if (__builtin_constant_p(nr)) { \
50 switch(nr & 7) { \
61 __asm__(OP " %w0,@%1"::"r"(nr),"r"(b_addr):"memory"); \
74 #define __set_bit(nr,addr) set_bit((nr),(addr)) argument
75 #define __clear_bit(nr,addr) clear_bit((nr),(addr)) argument
76 #define __change_bit(nr,addr) change_bit((nr),(addr)) argument
81 static __inline__ int test_bit(int nr, const unsigned long* addr) in test_bit() argument
84 ((nr >> 3) ^ 3)) & (1UL << (nr & 7))) != 0; in test_bit()
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/arch/arm/tools/
Dgen-mach-types5 BEGIN { nr = 0 }
10 machine_is[nr] = "machine_is_"$1;
11 config[nr] = "CONFIG_"$2;
12 mach_type[nr] = "MACH_TYPE_"$3;
13 num[nr] = $4; nr++
17 machine_is[nr] = "machine_is_"$1;
18 config[nr] = "CONFIG_"$2;
19 mach_type[nr] = "MACH_TYPE_"$3;
20 num[nr] = ""; nr++
37 for (i = 0; i < nr; i++)
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