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Searched refs:pred (Results 1 – 14 of 14) sorted by relevance

/arch/ia64/include/asm/xen/
Dinst.h59 #define MOV_FROM_IPSR(pred, reg) \ argument
60 (pred) movl reg = XSI_IPSR; \
62 (pred) ld8 reg = [reg]
96 .macro __MOV_FROM_PSR pred, reg, clob
98 (\pred) XEN_HYPER_GET_PSR;
102 (\pred) XEN_HYPER_GET_PSR
104 (\pred) mov \reg = r8
108 (\pred) mov \clob = r8
109 (\pred) XEN_HYPER_GET_PSR
111 (\pred) mov \reg = r8
[all …]
/arch/ia64/include/asm/native/
Dpvchk_inst.h146 #define IS_PRED_IN(pred) \ argument
148 (pred) nop 0 \
151 #define IS_PRED_OUT(pred) \ argument
153 cmp.eq pred, p0 = r0, r0 \
156 #define IS_PRED_CLOB(pred) IS_PRED_OUT(pred) argument
169 #define MOV_FROM_IPSR(pred, reg) \ argument
170 IS_PRED_IN(pred) \
179 #define MOV_FROM_PSR(pred, reg, clob) \ argument
180 IS_PRED_IN(pred) \
183 #define MOV_FROM_ITC(pred, pred_clob, reg, clob) \ argument
[all …]
Dinst.h63 #define MOV_FROM_IPSR(pred, reg) \ argument
64 (pred) mov reg = cr.ipsr
76 #define MOV_FROM_PSR(pred, reg, clob) \ argument
77 (pred) mov reg = psr \
80 #define MOV_FROM_ITC(pred, pred_clob, reg, clob) \ argument
81 (pred) mov reg = ar.itc \
89 #define MOV_TO_ITIR(pred, reg, clob) \ argument
90 (pred) mov cr.itir = reg \
93 #define MOV_TO_IHA(pred, reg, clob) \ argument
94 (pred) mov cr.iha = reg \
[all …]
/arch/ia64/lib/
Dcopy_user.S172 .pred.rel "mutex", p14, p15
209 .pred.rel "mutex", p14, p15
233 #define SWITCH(pred, shift) cmp.eq pred,p0=shift,rshift argument
234 #define CASE(pred, shift) \ argument
235 (pred) br.cond.spnt .copy_user_bit##shift
286 .pred.rel "mutex", p14, p15
Dclear_user.S197 .pred.rel "mutex", p6, p7
Dmemset.S322 .pred.rel "mutex",p_y, p_n
323 .pred.rel "mutex",p_yy, p_nn
/arch/arm/mach-imx/
Dclock-imx6q.c901 static void calc_pred_podf_dividers(u32 div, u32 *pred, u32 *podf) in calc_pred_podf_dividers() argument
906 *pred = 8; in calc_pred_podf_dividers()
914 *pred = temp_pred; in calc_pred_podf_dividers()
920 *pred = temp_pred; in calc_pred_podf_dividers()
923 *podf = (div + *pred - 1) / *pred; in calc_pred_podf_dividers()
925 *pred = div; in calc_pred_podf_dividers()
1110 u32 val, pred, podf; in _clk_get_rate() local
1126 pred = ((val & d->bm_pred) >> d->bp_pred) + 1; in _clk_get_rate()
1129 return clk_get_rate(clk->parent) / (pred * podf); in _clk_get_rate()
1163 u32 val, div, max_div, pred = 0, podf; in _clk_set_rate() local
[all …]
Dclock-mx51-mx53.c1033 u32 reg, pred, podf; \
1036 pred = (reg & MXC_CCM_CSCDR##nr##_##bitsname##_CLK_PRED_MASK) \
1042 (pred + 1) * (podf + 1)); \
/arch/x86/kernel/cpu/
Dperf_event_intel_lbr.c273 u64 from, to, mis = 0, pred = 0; in intel_pmu_lbr_read_64() local
280 pred = !mis; in intel_pmu_lbr_read_64()
287 cpuc->lbr_entries[i].predicted = pred; in intel_pmu_lbr_read_64()
/arch/ia64/kernel/
Dminstate.h246 .pred.rel "mutex", pKStk, pUStk
Dfsys.S281 .pred.rel.mutex p8,p9
457 .pred.rel.mutex p6,p7,p8
Dentry.S710 .pred.rel.mutex pUStk,pKStk
854 .pred.rel.mutex pUStk,pKStk
947 .pred.rel.mutex pUStk,pKStk
Divt.S142 .pred.rel "mutex", p6, p7
472 .pred.rel "mutex", p6, p7
Dhead.S384 .pred.rel.mutex isBP,isAP