1 /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10 #include <linux/platform_device.h>
11 #include <linux/serial_core.h>
12 #include <linux/input.h>
13 #include <linux/i2c.h>
14 #include <linux/gpio_keys.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/fb.h>
18 #include <linux/mfd/max8998.h>
19 #include <linux/regulator/machine.h>
20 #include <linux/regulator/fixed.h>
21 #include <linux/regulator/max8952.h>
22 #include <linux/mmc/host.h>
23 #include <linux/i2c-gpio.h>
24 #include <linux/i2c/mcs.h>
25 #include <linux/i2c/atmel_mxt_ts.h>
26
27 #include <asm/mach/arch.h>
28 #include <asm/hardware/gic.h>
29 #include <asm/mach-types.h>
30
31 #include <plat/regs-serial.h>
32 #include <plat/clock.h>
33 #include <plat/cpu.h>
34 #include <plat/devs.h>
35 #include <plat/iic.h>
36 #include <plat/gpio-cfg.h>
37 #include <plat/fb.h>
38 #include <plat/mfc.h>
39 #include <plat/sdhci.h>
40 #include <plat/pd.h>
41 #include <plat/regs-fb-v4.h>
42 #include <plat/fimc-core.h>
43 #include <plat/s5p-time.h>
44 #include <plat/camport.h>
45 #include <plat/mipi_csis.h>
46
47 #include <mach/map.h>
48
49 #include <media/v4l2-mediabus.h>
50 #include <media/s5p_fimc.h>
51 #include <media/m5mols.h>
52 #include <media/s5k6aa.h>
53
54 #include "common.h"
55
56 /* Following are default values for UCON, ULCON and UFCON UART registers */
57 #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
58 S3C2410_UCON_RXILEVEL | \
59 S3C2410_UCON_TXIRQMODE | \
60 S3C2410_UCON_RXIRQMODE | \
61 S3C2410_UCON_RXFIFO_TOI | \
62 S3C2443_UCON_RXERR_IRQEN)
63
64 #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
65
66 #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
67 S5PV210_UFCON_TXTRIG256 | \
68 S5PV210_UFCON_RXTRIG256)
69
70 static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
71 [0] = {
72 .hwport = 0,
73 .ucon = UNIVERSAL_UCON_DEFAULT,
74 .ulcon = UNIVERSAL_ULCON_DEFAULT,
75 .ufcon = UNIVERSAL_UFCON_DEFAULT,
76 },
77 [1] = {
78 .hwport = 1,
79 .ucon = UNIVERSAL_UCON_DEFAULT,
80 .ulcon = UNIVERSAL_ULCON_DEFAULT,
81 .ufcon = UNIVERSAL_UFCON_DEFAULT,
82 },
83 [2] = {
84 .hwport = 2,
85 .ucon = UNIVERSAL_UCON_DEFAULT,
86 .ulcon = UNIVERSAL_ULCON_DEFAULT,
87 .ufcon = UNIVERSAL_UFCON_DEFAULT,
88 },
89 [3] = {
90 .hwport = 3,
91 .ucon = UNIVERSAL_UCON_DEFAULT,
92 .ulcon = UNIVERSAL_ULCON_DEFAULT,
93 .ufcon = UNIVERSAL_UFCON_DEFAULT,
94 },
95 };
96
97 static struct regulator_consumer_supply max8952_consumer =
98 REGULATOR_SUPPLY("vdd_arm", NULL);
99
100 static struct max8952_platform_data universal_max8952_pdata __initdata = {
101 .gpio_vid0 = EXYNOS4_GPX0(3),
102 .gpio_vid1 = EXYNOS4_GPX0(4),
103 .gpio_en = -1, /* Not controllable, set "Always High" */
104 .default_mode = 0, /* vid0 = 0, vid1 = 0 */
105 .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
106 .sync_freq = 0, /* default: fastest */
107 .ramp_speed = 0, /* default: fastest */
108
109 .reg_data = {
110 .constraints = {
111 .name = "VARM_1.2V",
112 .min_uV = 770000,
113 .max_uV = 1400000,
114 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
115 .always_on = 1,
116 .boot_on = 1,
117 },
118 .num_consumer_supplies = 1,
119 .consumer_supplies = &max8952_consumer,
120 },
121 };
122
123 static struct regulator_consumer_supply lp3974_buck1_consumer =
124 REGULATOR_SUPPLY("vdd_int", NULL);
125
126 static struct regulator_consumer_supply lp3974_buck2_consumer =
127 REGULATOR_SUPPLY("vddg3d", NULL);
128
129 static struct regulator_consumer_supply lp3974_buck3_consumer[] = {
130 REGULATOR_SUPPLY("vdet", "s5p-sdo"),
131 REGULATOR_SUPPLY("vdd_reg", "0-003c"),
132 };
133
134 static struct regulator_init_data lp3974_buck1_data = {
135 .constraints = {
136 .name = "VINT_1.1V",
137 .min_uV = 750000,
138 .max_uV = 1500000,
139 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
140 REGULATOR_CHANGE_STATUS,
141 .boot_on = 1,
142 .state_mem = {
143 .disabled = 1,
144 },
145 },
146 .num_consumer_supplies = 1,
147 .consumer_supplies = &lp3974_buck1_consumer,
148 };
149
150 static struct regulator_init_data lp3974_buck2_data = {
151 .constraints = {
152 .name = "VG3D_1.1V",
153 .min_uV = 750000,
154 .max_uV = 1500000,
155 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
156 REGULATOR_CHANGE_STATUS,
157 .boot_on = 1,
158 .state_mem = {
159 .disabled = 1,
160 },
161 },
162 .num_consumer_supplies = 1,
163 .consumer_supplies = &lp3974_buck2_consumer,
164 };
165
166 static struct regulator_init_data lp3974_buck3_data = {
167 .constraints = {
168 .name = "VCC_1.8V",
169 .min_uV = 1800000,
170 .max_uV = 1800000,
171 .apply_uV = 1,
172 .always_on = 1,
173 .state_mem = {
174 .enabled = 1,
175 },
176 },
177 .num_consumer_supplies = ARRAY_SIZE(lp3974_buck3_consumer),
178 .consumer_supplies = lp3974_buck3_consumer,
179 };
180
181 static struct regulator_init_data lp3974_buck4_data = {
182 .constraints = {
183 .name = "VMEM_1.2V",
184 .min_uV = 1200000,
185 .max_uV = 1200000,
186 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
187 .apply_uV = 1,
188 .state_mem = {
189 .disabled = 1,
190 },
191 },
192 };
193
194 static struct regulator_init_data lp3974_ldo2_data = {
195 .constraints = {
196 .name = "VALIVE_1.2V",
197 .min_uV = 1200000,
198 .max_uV = 1200000,
199 .apply_uV = 1,
200 .always_on = 1,
201 .state_mem = {
202 .enabled = 1,
203 },
204 },
205 };
206
207 static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
208 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
209 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
210 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
211 };
212
213 static struct regulator_init_data lp3974_ldo3_data = {
214 .constraints = {
215 .name = "VUSB+MIPI_1.1V",
216 .min_uV = 1100000,
217 .max_uV = 1100000,
218 .apply_uV = 1,
219 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
220 .state_mem = {
221 .disabled = 1,
222 },
223 },
224 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
225 .consumer_supplies = lp3974_ldo3_consumer,
226 };
227
228 static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
229 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
230 };
231
232 static struct regulator_init_data lp3974_ldo4_data = {
233 .constraints = {
234 .name = "VADC_3.3V",
235 .min_uV = 3300000,
236 .max_uV = 3300000,
237 .apply_uV = 1,
238 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
239 .state_mem = {
240 .disabled = 1,
241 },
242 },
243 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
244 .consumer_supplies = lp3974_ldo4_consumer,
245 };
246
247 static struct regulator_init_data lp3974_ldo5_data = {
248 .constraints = {
249 .name = "VTF_2.8V",
250 .min_uV = 2800000,
251 .max_uV = 2800000,
252 .apply_uV = 1,
253 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
254 .state_mem = {
255 .disabled = 1,
256 },
257 },
258 };
259
260 static struct regulator_init_data lp3974_ldo6_data = {
261 .constraints = {
262 .name = "LDO6",
263 .min_uV = 2000000,
264 .max_uV = 2000000,
265 .apply_uV = 1,
266 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
267 .state_mem = {
268 .disabled = 1,
269 },
270 },
271 };
272
273 static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
274 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"),
275 };
276
277 static struct regulator_init_data lp3974_ldo7_data = {
278 .constraints = {
279 .name = "VLCD+VMIPI_1.8V",
280 .min_uV = 1800000,
281 .max_uV = 1800000,
282 .apply_uV = 1,
283 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
284 .state_mem = {
285 .disabled = 1,
286 },
287 },
288 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer),
289 .consumer_supplies = lp3974_ldo7_consumer,
290 };
291
292 static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
293 REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
294 };
295
296 static struct regulator_init_data lp3974_ldo8_data = {
297 .constraints = {
298 .name = "VUSB+VDAC_3.3V",
299 .min_uV = 3300000,
300 .max_uV = 3300000,
301 .apply_uV = 1,
302 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
303 .state_mem = {
304 .disabled = 1,
305 },
306 },
307 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
308 .consumer_supplies = lp3974_ldo8_consumer,
309 };
310
311 static struct regulator_consumer_supply lp3974_ldo9_consumer =
312 REGULATOR_SUPPLY("vddio", "0-003c");
313
314 static struct regulator_init_data lp3974_ldo9_data = {
315 .constraints = {
316 .name = "VCC_2.8V",
317 .min_uV = 2800000,
318 .max_uV = 2800000,
319 .apply_uV = 1,
320 .always_on = 1,
321 .state_mem = {
322 .enabled = 1,
323 },
324 },
325 .num_consumer_supplies = 1,
326 .consumer_supplies = &lp3974_ldo9_consumer,
327 };
328
329 static struct regulator_init_data lp3974_ldo10_data = {
330 .constraints = {
331 .name = "VPLL_1.1V",
332 .min_uV = 1100000,
333 .max_uV = 1100000,
334 .boot_on = 1,
335 .apply_uV = 1,
336 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
337 .state_mem = {
338 .disabled = 1,
339 },
340 },
341 };
342
343 static struct regulator_consumer_supply lp3974_ldo11_consumer =
344 REGULATOR_SUPPLY("dig_28", "0-001f");
345
346 static struct regulator_init_data lp3974_ldo11_data = {
347 .constraints = {
348 .name = "CAM_AF_3.3V",
349 .min_uV = 3300000,
350 .max_uV = 3300000,
351 .apply_uV = 1,
352 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
353 .state_mem = {
354 .disabled = 1,
355 },
356 },
357 .num_consumer_supplies = 1,
358 .consumer_supplies = &lp3974_ldo11_consumer,
359 };
360
361 static struct regulator_init_data lp3974_ldo12_data = {
362 .constraints = {
363 .name = "PS_2.8V",
364 .min_uV = 2800000,
365 .max_uV = 2800000,
366 .apply_uV = 1,
367 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
368 .state_mem = {
369 .disabled = 1,
370 },
371 },
372 };
373
374 static struct regulator_init_data lp3974_ldo13_data = {
375 .constraints = {
376 .name = "VHIC_1.2V",
377 .min_uV = 1200000,
378 .max_uV = 1200000,
379 .apply_uV = 1,
380 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
381 .state_mem = {
382 .disabled = 1,
383 },
384 },
385 };
386
387 static struct regulator_consumer_supply lp3974_ldo14_consumer =
388 REGULATOR_SUPPLY("dig_18", "0-001f");
389
390 static struct regulator_init_data lp3974_ldo14_data = {
391 .constraints = {
392 .name = "CAM_I_HOST_1.8V",
393 .min_uV = 1800000,
394 .max_uV = 1800000,
395 .apply_uV = 1,
396 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
397 .state_mem = {
398 .disabled = 1,
399 },
400 },
401 .num_consumer_supplies = 1,
402 .consumer_supplies = &lp3974_ldo14_consumer,
403 };
404
405
406 static struct regulator_consumer_supply lp3974_ldo15_consumer =
407 REGULATOR_SUPPLY("dig_12", "0-001f");
408
409 static struct regulator_init_data lp3974_ldo15_data = {
410 .constraints = {
411 .name = "CAM_S_DIG+FM33_CORE_1.2V",
412 .min_uV = 1200000,
413 .max_uV = 1200000,
414 .apply_uV = 1,
415 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
416 .state_mem = {
417 .disabled = 1,
418 },
419 },
420 .num_consumer_supplies = 1,
421 .consumer_supplies = &lp3974_ldo15_consumer,
422 };
423
424 static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
425 REGULATOR_SUPPLY("vdda", "0-003c"),
426 REGULATOR_SUPPLY("a_sensor", "0-001f"),
427 };
428
429 static struct regulator_init_data lp3974_ldo16_data = {
430 .constraints = {
431 .name = "CAM_S_ANA_2.8V",
432 .min_uV = 2800000,
433 .max_uV = 2800000,
434 .apply_uV = 1,
435 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
436 .state_mem = {
437 .disabled = 1,
438 },
439 },
440 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer),
441 .consumer_supplies = lp3974_ldo16_consumer,
442 };
443
444 static struct regulator_init_data lp3974_ldo17_data = {
445 .constraints = {
446 .name = "VCC_3.0V_LCD",
447 .min_uV = 3000000,
448 .max_uV = 3000000,
449 .apply_uV = 1,
450 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
451 .boot_on = 1,
452 .state_mem = {
453 .disabled = 1,
454 },
455 },
456 };
457
458 static struct regulator_init_data lp3974_32khz_ap_data = {
459 .constraints = {
460 .name = "32KHz AP",
461 .always_on = 1,
462 .state_mem = {
463 .enabled = 1,
464 },
465 },
466 };
467
468 static struct regulator_init_data lp3974_32khz_cp_data = {
469 .constraints = {
470 .name = "32KHz CP",
471 .state_mem = {
472 .disabled = 1,
473 },
474 },
475 };
476
477 static struct regulator_init_data lp3974_vichg_data = {
478 .constraints = {
479 .name = "VICHG",
480 .state_mem = {
481 .disabled = 1,
482 },
483 },
484 };
485
486 static struct regulator_init_data lp3974_esafeout1_data = {
487 .constraints = {
488 .name = "SAFEOUT1",
489 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
490 .state_mem = {
491 .enabled = 1,
492 },
493 },
494 };
495
496 static struct regulator_init_data lp3974_esafeout2_data = {
497 .constraints = {
498 .name = "SAFEOUT2",
499 .boot_on = 1,
500 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
501 .state_mem = {
502 .enabled = 1,
503 },
504 },
505 };
506
507 static struct max8998_regulator_data lp3974_regulators[] = {
508 { MAX8998_LDO2, &lp3974_ldo2_data },
509 { MAX8998_LDO3, &lp3974_ldo3_data },
510 { MAX8998_LDO4, &lp3974_ldo4_data },
511 { MAX8998_LDO5, &lp3974_ldo5_data },
512 { MAX8998_LDO6, &lp3974_ldo6_data },
513 { MAX8998_LDO7, &lp3974_ldo7_data },
514 { MAX8998_LDO8, &lp3974_ldo8_data },
515 { MAX8998_LDO9, &lp3974_ldo9_data },
516 { MAX8998_LDO10, &lp3974_ldo10_data },
517 { MAX8998_LDO11, &lp3974_ldo11_data },
518 { MAX8998_LDO12, &lp3974_ldo12_data },
519 { MAX8998_LDO13, &lp3974_ldo13_data },
520 { MAX8998_LDO14, &lp3974_ldo14_data },
521 { MAX8998_LDO15, &lp3974_ldo15_data },
522 { MAX8998_LDO16, &lp3974_ldo16_data },
523 { MAX8998_LDO17, &lp3974_ldo17_data },
524 { MAX8998_BUCK1, &lp3974_buck1_data },
525 { MAX8998_BUCK2, &lp3974_buck2_data },
526 { MAX8998_BUCK3, &lp3974_buck3_data },
527 { MAX8998_BUCK4, &lp3974_buck4_data },
528 { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
529 { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
530 { MAX8998_ENVICHG, &lp3974_vichg_data },
531 { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
532 { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
533 };
534
535 static struct max8998_platform_data universal_lp3974_pdata = {
536 .num_regulators = ARRAY_SIZE(lp3974_regulators),
537 .regulators = lp3974_regulators,
538 .buck1_voltage1 = 1100000, /* INT */
539 .buck1_voltage2 = 1000000,
540 .buck1_voltage3 = 1100000,
541 .buck1_voltage4 = 1000000,
542 .buck1_set1 = EXYNOS4_GPX0(5),
543 .buck1_set2 = EXYNOS4_GPX0(6),
544 .buck2_voltage1 = 1200000, /* G3D */
545 .buck2_voltage2 = 1100000,
546 .buck1_default_idx = 0,
547 .buck2_set3 = EXYNOS4_GPE2(0),
548 .buck2_default_idx = 0,
549 .wakeup = true,
550 };
551
552
553 enum fixed_regulator_id {
554 FIXED_REG_ID_MMC0,
555 FIXED_REG_ID_HDMI_5V,
556 FIXED_REG_ID_CAM_S_IF,
557 FIXED_REG_ID_CAM_I_CORE,
558 FIXED_REG_ID_CAM_VT_DIO,
559 };
560
561 static struct regulator_consumer_supply hdmi_fixed_consumer =
562 REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
563
564 static struct regulator_init_data hdmi_fixed_voltage_init_data = {
565 .constraints = {
566 .name = "HDMI_5V",
567 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
568 },
569 .num_consumer_supplies = 1,
570 .consumer_supplies = &hdmi_fixed_consumer,
571 };
572
573 static struct fixed_voltage_config hdmi_fixed_voltage_config = {
574 .supply_name = "HDMI_EN1",
575 .microvolts = 5000000,
576 .gpio = EXYNOS4_GPE0(1),
577 .enable_high = true,
578 .init_data = &hdmi_fixed_voltage_init_data,
579 };
580
581 static struct platform_device hdmi_fixed_voltage = {
582 .name = "reg-fixed-voltage",
583 .id = FIXED_REG_ID_HDMI_5V,
584 .dev = {
585 .platform_data = &hdmi_fixed_voltage_config,
586 },
587 };
588
589 /* GPIO I2C 5 (PMIC) */
590 static struct i2c_board_info i2c5_devs[] __initdata = {
591 {
592 I2C_BOARD_INFO("max8952", 0xC0 >> 1),
593 .platform_data = &universal_max8952_pdata,
594 }, {
595 I2C_BOARD_INFO("lp3974", 0xCC >> 1),
596 .platform_data = &universal_lp3974_pdata,
597 },
598 };
599
600 /* I2C3 (TSP) */
601 static struct mxt_platform_data qt602240_platform_data = {
602 .x_line = 19,
603 .y_line = 11,
604 .x_size = 800,
605 .y_size = 480,
606 .blen = 0x11,
607 .threshold = 0x28,
608 .voltage = 2800000, /* 2.8V */
609 .orient = MXT_DIAGONAL,
610 .irqflags = IRQF_TRIGGER_FALLING,
611 };
612
613 static struct i2c_board_info i2c3_devs[] __initdata = {
614 {
615 I2C_BOARD_INFO("qt602240_ts", 0x4a),
616 .platform_data = &qt602240_platform_data,
617 },
618 };
619
universal_tsp_init(void)620 static void __init universal_tsp_init(void)
621 {
622 int gpio;
623
624 /* TSP_LDO_ON: XMDMADDR_11 */
625 gpio = EXYNOS4_GPE2(3);
626 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
627 gpio_export(gpio, 0);
628
629 /* TSP_INT: XMDMADDR_7 */
630 gpio = EXYNOS4_GPE1(7);
631 gpio_request(gpio, "TSP_INT");
632
633 s5p_register_gpio_interrupt(gpio);
634 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
635 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
636 i2c3_devs[0].irq = gpio_to_irq(gpio);
637 }
638
639
640 /* GPIO I2C 12 (3 Touchkey) */
641 static uint32_t touchkey_keymap[] = {
642 /* MCS_KEY_MAP(value, keycode) */
643 MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
644 MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
645 };
646
647 static struct mcs_platform_data touchkey_data = {
648 .keymap = touchkey_keymap,
649 .keymap_size = ARRAY_SIZE(touchkey_keymap),
650 .key_maxval = 2,
651 };
652
653 /* GPIO I2C 3_TOUCH 2.8V */
654 #define I2C_GPIO_BUS_12 12
655 static struct i2c_gpio_platform_data i2c_gpio12_data = {
656 .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
657 .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
658 };
659
660 static struct platform_device i2c_gpio12 = {
661 .name = "i2c-gpio",
662 .id = I2C_GPIO_BUS_12,
663 .dev = {
664 .platform_data = &i2c_gpio12_data,
665 },
666 };
667
668 static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
669 {
670 I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
671 .platform_data = &touchkey_data,
672 },
673 };
674
universal_touchkey_init(void)675 static void __init universal_touchkey_init(void)
676 {
677 int gpio;
678
679 gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
680 gpio_request(gpio, "3_TOUCH_INT");
681 s5p_register_gpio_interrupt(gpio);
682 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
683 i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
684
685 gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
686 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
687 }
688
689 static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
690 .frequency = 300 * 1000,
691 .sda_delay = 200,
692 };
693
694 /* GPIO KEYS */
695 static struct gpio_keys_button universal_gpio_keys_tables[] = {
696 {
697 .code = KEY_VOLUMEUP,
698 .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
699 .desc = "gpio-keys: KEY_VOLUMEUP",
700 .type = EV_KEY,
701 .active_low = 1,
702 .debounce_interval = 1,
703 }, {
704 .code = KEY_VOLUMEDOWN,
705 .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
706 .desc = "gpio-keys: KEY_VOLUMEDOWN",
707 .type = EV_KEY,
708 .active_low = 1,
709 .debounce_interval = 1,
710 }, {
711 .code = KEY_CONFIG,
712 .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
713 .desc = "gpio-keys: KEY_CONFIG",
714 .type = EV_KEY,
715 .active_low = 1,
716 .debounce_interval = 1,
717 }, {
718 .code = KEY_CAMERA,
719 .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
720 .desc = "gpio-keys: KEY_CAMERA",
721 .type = EV_KEY,
722 .active_low = 1,
723 .debounce_interval = 1,
724 }, {
725 .code = KEY_OK,
726 .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
727 .desc = "gpio-keys: KEY_OK",
728 .type = EV_KEY,
729 .active_low = 1,
730 .debounce_interval = 1,
731 },
732 };
733
734 static struct gpio_keys_platform_data universal_gpio_keys_data = {
735 .buttons = universal_gpio_keys_tables,
736 .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
737 };
738
739 static struct platform_device universal_gpio_keys = {
740 .name = "gpio-keys",
741 .dev = {
742 .platform_data = &universal_gpio_keys_data,
743 },
744 };
745
746 /* eMMC */
747 static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
748 .max_width = 8,
749 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
750 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
751 .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
752 .cd_type = S3C_SDHCI_CD_PERMANENT,
753 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
754 };
755
756 static struct regulator_consumer_supply mmc0_supplies[] = {
757 REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.0"),
758 };
759
760 static struct regulator_init_data mmc0_fixed_voltage_init_data = {
761 .constraints = {
762 .name = "VMEM_VDD_2.8V",
763 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
764 },
765 .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
766 .consumer_supplies = mmc0_supplies,
767 };
768
769 static struct fixed_voltage_config mmc0_fixed_voltage_config = {
770 .supply_name = "MASSMEMORY_EN",
771 .microvolts = 2800000,
772 .gpio = EXYNOS4_GPE1(3),
773 .enable_high = true,
774 .init_data = &mmc0_fixed_voltage_init_data,
775 };
776
777 static struct platform_device mmc0_fixed_voltage = {
778 .name = "reg-fixed-voltage",
779 .id = FIXED_REG_ID_MMC0,
780 .dev = {
781 .platform_data = &mmc0_fixed_voltage_config,
782 },
783 };
784
785 /* SD */
786 static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
787 .max_width = 4,
788 .host_caps = MMC_CAP_4_BIT_DATA |
789 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
790 .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
791 .ext_cd_gpio_invert = 1,
792 .cd_type = S3C_SDHCI_CD_GPIO,
793 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
794 };
795
796 /* WiFi */
797 static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
798 .max_width = 4,
799 .host_caps = MMC_CAP_4_BIT_DATA |
800 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
801 .cd_type = S3C_SDHCI_CD_EXTERNAL,
802 };
803
universal_sdhci_init(void)804 static void __init universal_sdhci_init(void)
805 {
806 s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
807 s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
808 s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
809 }
810
811 /* I2C1 */
812 static struct i2c_board_info i2c1_devs[] __initdata = {
813 /* Gyro, To be updated */
814 };
815
816 /* Frame Buffer */
817 static struct s3c_fb_pd_win universal_fb_win0 = {
818 .win_mode = {
819 .left_margin = 16,
820 .right_margin = 16,
821 .upper_margin = 2,
822 .lower_margin = 28,
823 .hsync_len = 2,
824 .vsync_len = 1,
825 .xres = 480,
826 .yres = 800,
827 .refresh = 55,
828 },
829 .max_bpp = 32,
830 .default_bpp = 16,
831 .virtual_x = 480,
832 .virtual_y = 2 * 800,
833 };
834
835 static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
836 .win[0] = &universal_fb_win0,
837 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
838 VIDCON0_CLKSEL_LCD,
839 .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
840 | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
841 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
842 };
843
844 static struct regulator_consumer_supply cam_vt_dio_supply =
845 REGULATOR_SUPPLY("vdd_core", "0-003c");
846
847 static struct regulator_init_data cam_vt_dio_reg_init_data = {
848 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
849 .num_consumer_supplies = 1,
850 .consumer_supplies = &cam_vt_dio_supply,
851 };
852
853 static struct fixed_voltage_config cam_vt_dio_fixed_voltage_cfg = {
854 .supply_name = "CAM_VT_D_IO",
855 .microvolts = 2800000,
856 .gpio = EXYNOS4_GPE2(1), /* CAM_PWR_EN2 */
857 .enable_high = 1,
858 .init_data = &cam_vt_dio_reg_init_data,
859 };
860
861 static struct platform_device cam_vt_dio_fixed_reg_dev = {
862 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_DIO,
863 .dev = { .platform_data = &cam_vt_dio_fixed_voltage_cfg },
864 };
865
866 static struct regulator_consumer_supply cam_i_core_supply =
867 REGULATOR_SUPPLY("core", "0-001f");
868
869 static struct regulator_init_data cam_i_core_reg_init_data = {
870 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
871 .num_consumer_supplies = 1,
872 .consumer_supplies = &cam_i_core_supply,
873 };
874
875 static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
876 .supply_name = "CAM_I_CORE_1.2V",
877 .microvolts = 1200000,
878 .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
879 .enable_high = 1,
880 .init_data = &cam_i_core_reg_init_data,
881 };
882
883 static struct platform_device cam_i_core_fixed_reg_dev = {
884 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
885 .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
886 };
887
888 static struct regulator_consumer_supply cam_s_if_supply =
889 REGULATOR_SUPPLY("d_sensor", "0-001f");
890
891 static struct regulator_init_data cam_s_if_reg_init_data = {
892 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
893 .num_consumer_supplies = 1,
894 .consumer_supplies = &cam_s_if_supply,
895 };
896
897 static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
898 .supply_name = "CAM_S_IF_1.8V",
899 .microvolts = 1800000,
900 .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
901 .enable_high = 1,
902 .init_data = &cam_s_if_reg_init_data,
903 };
904
905 static struct platform_device cam_s_if_fixed_reg_dev = {
906 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
907 .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
908 };
909
910 static struct s5p_platform_mipi_csis mipi_csis_platdata = {
911 .clk_rate = 166000000UL,
912 .lanes = 2,
913 .alignment = 32,
914 .hs_settle = 12,
915 .phy_enable = s5p_csis_phy_enable,
916 };
917
918 #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
919 #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
920 #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
921 #define GPIO_CAM_VGA_NRST EXYNOS4_GPE4(7)
922 #define GPIO_CAM_VGA_NSTBY EXYNOS4_GPE4(6)
923
s5k6aa_set_power(int on)924 static int s5k6aa_set_power(int on)
925 {
926 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
927 return 0;
928 }
929
930 static struct s5k6aa_platform_data s5k6aa_platdata = {
931 .mclk_frequency = 21600000UL,
932 .gpio_reset = { GPIO_CAM_VGA_NRST, 0 },
933 .gpio_stby = { GPIO_CAM_VGA_NSTBY, 0 },
934 .bus_type = V4L2_MBUS_PARALLEL,
935 .horiz_flip = 1,
936 .set_power = s5k6aa_set_power,
937 };
938
939 static struct i2c_board_info s5k6aa_board_info = {
940 I2C_BOARD_INFO("S5K6AA", 0x3C),
941 .platform_data = &s5k6aa_platdata,
942 };
943
m5mols_set_power(struct device * dev,int on)944 static int m5mols_set_power(struct device *dev, int on)
945 {
946 gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
947 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
948 return 0;
949 }
950
951 static struct m5mols_platform_data m5mols_platdata = {
952 .gpio_reset = GPIO_CAM_MEGA_nRST,
953 .reset_polarity = 0,
954 .set_power = m5mols_set_power,
955 };
956
957 static struct i2c_board_info m5mols_board_info = {
958 I2C_BOARD_INFO("M5MOLS", 0x1F),
959 .platform_data = &m5mols_platdata,
960 };
961
962 static struct s5p_fimc_isp_info universal_camera_sensors[] = {
963 {
964 .mux_id = 0,
965 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
966 V4L2_MBUS_VSYNC_ACTIVE_LOW,
967 .bus_type = FIMC_ITU_601,
968 .board_info = &s5k6aa_board_info,
969 .i2c_bus_num = 0,
970 .clk_frequency = 24000000UL,
971 }, {
972 .mux_id = 0,
973 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
974 V4L2_MBUS_VSYNC_ACTIVE_LOW,
975 .bus_type = FIMC_MIPI_CSI2,
976 .board_info = &m5mols_board_info,
977 .i2c_bus_num = 0,
978 .clk_frequency = 24000000UL,
979 .csi_data_align = 32,
980 },
981 };
982
983 static struct s5p_platform_fimc fimc_md_platdata = {
984 .isp_info = universal_camera_sensors,
985 .num_clients = ARRAY_SIZE(universal_camera_sensors),
986 };
987
988 static struct gpio universal_camera_gpios[] = {
989 { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
990 { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" },
991 { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
992 { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
993 { GPIO_CAM_VGA_NRST, GPIOF_OUT_INIT_LOW, "CAM_VGA_NRST" },
994 { GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" },
995 };
996
universal_camera_init(void)997 static void __init universal_camera_init(void)
998 {
999 s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
1000 &s5p_device_mipi_csis0);
1001 s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
1002 &s5p_device_fimc_md);
1003
1004 if (gpio_request_array(universal_camera_gpios,
1005 ARRAY_SIZE(universal_camera_gpios))) {
1006 pr_err("%s: GPIO request failed\n", __func__);
1007 return;
1008 }
1009
1010 if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
1011 m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
1012 else
1013 pr_err("Failed to configure 8M_ISP_INT GPIO\n");
1014
1015 /* Free GPIOs controlled directly by the sensor drivers. */
1016 gpio_free(GPIO_CAM_MEGA_nRST);
1017 gpio_free(GPIO_CAM_8M_ISP_INT);
1018 gpio_free(GPIO_CAM_VGA_NRST);
1019 gpio_free(GPIO_CAM_VGA_NSTBY);
1020
1021 if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
1022 pr_err("Camera port A setup failed\n");
1023 }
1024
1025 static struct platform_device *universal_devices[] __initdata = {
1026 /* Samsung Platform Devices */
1027 &s5p_device_mipi_csis0,
1028 &s5p_device_fimc0,
1029 &s5p_device_fimc1,
1030 &s5p_device_fimc2,
1031 &s5p_device_fimc3,
1032 &s5p_device_g2d,
1033 &mmc0_fixed_voltage,
1034 &s3c_device_hsmmc0,
1035 &s3c_device_hsmmc2,
1036 &s3c_device_hsmmc3,
1037 &s3c_device_i2c0,
1038 &s3c_device_i2c3,
1039 &s3c_device_i2c5,
1040 &s5p_device_i2c_hdmiphy,
1041 &hdmi_fixed_voltage,
1042 &s5p_device_hdmi,
1043 &s5p_device_sdo,
1044 &s5p_device_mixer,
1045
1046 /* Universal Devices */
1047 &i2c_gpio12,
1048 &universal_gpio_keys,
1049 &s5p_device_onenand,
1050 &s5p_device_fimd0,
1051 &s5p_device_jpeg,
1052 &s5p_device_mfc,
1053 &s5p_device_mfc_l,
1054 &s5p_device_mfc_r,
1055 &cam_vt_dio_fixed_reg_dev,
1056 &cam_i_core_fixed_reg_dev,
1057 &cam_s_if_fixed_reg_dev,
1058 &s5p_device_fimc_md,
1059 };
1060
universal_map_io(void)1061 static void __init universal_map_io(void)
1062 {
1063 clk_xusbxti.rate = 24000000;
1064 exynos_init_io(NULL, 0);
1065 s3c24xx_init_clocks(24000000);
1066 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
1067 s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
1068 }
1069
s5p_tv_setup(void)1070 static void s5p_tv_setup(void)
1071 {
1072 /* direct HPD to HDMI chip */
1073 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
1074 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
1075 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
1076 }
1077
universal_reserve(void)1078 static void __init universal_reserve(void)
1079 {
1080 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
1081 }
1082
universal_machine_init(void)1083 static void __init universal_machine_init(void)
1084 {
1085 universal_sdhci_init();
1086 s5p_tv_setup();
1087
1088 s3c_i2c0_set_platdata(&universal_i2c0_platdata);
1089 i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
1090
1091 universal_tsp_init();
1092 s3c_i2c3_set_platdata(NULL);
1093 i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
1094
1095 s3c_i2c5_set_platdata(NULL);
1096 s5p_i2c_hdmiphy_set_platdata(NULL);
1097 i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
1098
1099 s5p_fimd0_set_platdata(&universal_lcd_pdata);
1100
1101 universal_touchkey_init();
1102 i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
1103 ARRAY_SIZE(i2c_gpio12_devs));
1104
1105 universal_camera_init();
1106
1107 /* Last */
1108 platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
1109 }
1110
1111 MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1112 /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
1113 .atag_offset = 0x100,
1114 .init_irq = exynos4_init_irq,
1115 .map_io = universal_map_io,
1116 .handle_irq = gic_handle_irq,
1117 .init_machine = universal_machine_init,
1118 .timer = &s5p_timer,
1119 .reserve = &universal_reserve,
1120 .restart = exynos4_restart,
1121 MACHINE_END
1122