Lines Matching refs:clocks
34 clocks {
39 /* External clocks */
68 /* Fixed factor clocks */
72 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
79 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
86 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
91 /* Special CPG clocks */
94 compatible = "renesas,r7s72100-cpg-clocks",
95 "renesas,rz-cpg-clocks";
97 clocks = <&extal_clk>, <&usb_x1_clk>;
102 /* MSTP clocks */
105 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
107 clocks = <&p0_clk>;
114 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
116 clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
127 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
129 clocks = <&p0_clk>, <&p0_clk>;
136 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
138 clocks = <&p0_clk>;
145 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
147 clocks = <&b_clk>, <&p1_clk>, <&p1_clk>;
154 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
156 clocks = <&p1_clk>;
163 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
165 clocks = <&p0_clk>, <&p0_clk>, <&p0_clk>, <&p0_clk>;
174 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
176 clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
186 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
188 clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>;
295 clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
308 clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
321 clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
334 clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
347 clocks = <&mstp4_clks R7S72100_CLK_SCIF4>;
360 clocks = <&mstp4_clks R7S72100_CLK_SCIF5>;
373 clocks = <&mstp4_clks R7S72100_CLK_SCIF6>;
386 clocks = <&mstp4_clks R7S72100_CLK_SCIF7>;
399 clocks = <&mstp10_clks R7S72100_CLK_SPI0>;
414 clocks = <&mstp10_clks R7S72100_CLK_SPI1>;
429 clocks = <&mstp10_clks R7S72100_CLK_SPI2>;
444 clocks = <&mstp10_clks R7S72100_CLK_SPI3>;
459 clocks = <&mstp10_clks R7S72100_CLK_SPI4>;
490 clocks = <&p0_clk>;
506 clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
525 clocks = <&mstp9_clks R7S72100_CLK_I2C1>;
544 clocks = <&mstp9_clks R7S72100_CLK_I2C2>;
563 clocks = <&mstp9_clks R7S72100_CLK_I2C3>;
574 clocks = <&mstp3_clks R7S72100_CLK_MTU2>;
585 clocks = <&mstp7_clks R7S72100_CLK_ETHER>;
599 clocks = <&mstp8_clks R7S72100_CLK_MMCIF>;
613 clocks = <&mstp12_clks R7S72100_CLK_SDHI00>,
629 clocks = <&mstp12_clks R7S72100_CLK_SDHI10>,
642 clocks = <&mstp5_clks R7S72100_CLK_OSTM0>;
651 clocks = <&mstp5_clks R7S72100_CLK_OSTM1>;
663 clocks = <&mstp6_clks R7S72100_CLK_RTC>, <&rtc_x1_clk>,