Lines Matching refs:clocks
62 external-clocks {
91 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
103 clocks: clock-controller@e0100000 { label
107 clocks = <&xxti>, <&xusbxti>;
143 clocks = <&clocks CLK_PDMA0>;
155 clocks = <&clocks CLK_PDMA1>;
170 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
186 clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
200 clocks = <&clocks CLK_KEYIF>;
210 clocks = <&clocks CLK_I2C0>;
224 clocks = <&clocks CLK_I2C2>;
245 clocks = <&clocks DOUT_HCLKP>, <&xxti>,
246 <&clocks FOUT_EPLL>,
247 <&clocks SCLK_AUDIO0>;
261 clocks = <&clk_audss CLK_I2S>,
280 clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
295 clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>;
308 clocks = <&clocks CLK_PWM>;
318 clocks = <&clocks CLK_WDT>;
326 clocks = <&clocks CLK_RTC>;
338 clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
339 <&clocks SCLK_UART0>;
350 clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>,
351 <&clocks SCLK_UART1>;
362 clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>,
363 <&clocks SCLK_UART2>;
374 clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
375 <&clocks SCLK_UART3>;
385 clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>,
386 <&clocks SCLK_MMC0>;
396 clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>,
397 <&clocks SCLK_MMC1>;
407 clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>,
408 <&clocks SCLK_MMC2>;
418 clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>,
419 <&clocks SCLK_MMC3>;
428 clocks = <&clocks CLK_USB_OTG>;
439 clocks = <&clocks CLK_USB_OTG>, <&xusbxti>;
450 clocks = <&clocks CLK_USB_HOST>;
467 clocks = <&clocks CLK_USB_HOST>;
484 clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>;
522 clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>;
532 clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>;
541 clocks = <&clocks CLK_MDMA>;
553 clocks = <&clocks CLK_I2C1>;
566 clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>;
581 clocks = <&clocks CLK_CSIS>,
582 <&clocks SCLK_CSIS>;
596 clocks = <&clocks CLK_FIMC0>,
597 <&clocks SCLK_FIMC0>;
610 clocks = <&clocks CLK_FIMC1>,
611 <&clocks SCLK_FIMC1>;
624 clocks = <&clocks CLK_FIMC2>,
625 <&clocks SCLK_FIMC2>;