54 static void __iomem *avic_base;  variable
66 		irqt = imx_readl(avic_base + AVIC_INTTYPEL) & ~(1 << hwirq);  in avic_set_irq_fiq()
67 		imx_writel(irqt | (!!type << hwirq), avic_base + AVIC_INTTYPEL);  in avic_set_irq_fiq()
70 		irqt = imx_readl(avic_base + AVIC_INTTYPEH) & ~(1 << hwirq);  in avic_set_irq_fiq()
71 		imx_writel(irqt | (!!type << hwirq), avic_base + AVIC_INTTYPEH);  in avic_set_irq_fiq()
94 	avic_saved_mask_reg[idx] = imx_readl(avic_base + ct->regs.mask);  in avic_irq_suspend()
95 	imx_writel(gc->wake_active, avic_base + ct->regs.mask);  in avic_irq_suspend()
104 	imx_writel(avic_saved_mask_reg[idx], avic_base + ct->regs.mask);  in avic_irq_resume()
117 	gc = irq_alloc_generic_chip("mxc-avic", 1, irq_start, avic_base,  in avic_init_gc()
140 		nivector = imx_readl(avic_base + AVIC_NIVECSR) >> 16;  in avic_handle_irq()
159 	avic_base = irqbase;  in mxc_init_irq()
164 	imx_writel(0, avic_base + AVIC_INTCNTL);  in mxc_init_irq()
165 	imx_writel(0x1f, avic_base + AVIC_NIMASK);  in mxc_init_irq()
168 	imx_writel(0, avic_base + AVIC_INTENABLEH);  in mxc_init_irq()
169 	imx_writel(0, avic_base + AVIC_INTENABLEL);  in mxc_init_irq()
172 	imx_writel(0, avic_base + AVIC_INTTYPEH);  in mxc_init_irq()
173 	imx_writel(0, avic_base + AVIC_INTTYPEL);  in mxc_init_irq()
188 		imx_writel(0, avic_base + AVIC_NIPRIORITY(i));  in mxc_init_irq()